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authorJin Wang <[email protected]>2014-11-14 18:45:46 -0500
committerJin Wang <[email protected]>2016-07-06 02:17:15 -0400
commit8ef2e4eb13093c59190439800fdd0cc552a3779e (patch)
treeda3ab84939d3faabd8384e8d79e10766453c3e24 /src/cuda-sim
parent69bb1082de9df29d1d7b40486301049767e607b0 (diff)
ADD: add cdp latency
Diffstat (limited to 'src/cuda-sim')
-rw-r--r--src/cuda-sim/cuda-sim.cc21
-rw-r--r--src/cuda-sim/ptx_ir.cc10
2 files changed, 22 insertions, 9 deletions
diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc
index 276cb9d..9ecd92b 100644
--- a/src/cuda-sim/cuda-sim.cc
+++ b/src/cuda-sim/cuda-sim.cc
@@ -64,6 +64,8 @@ unsigned gpgpu_param_num_shaders = 0;
char *opcode_latency_int, *opcode_latency_fp, *opcode_latency_dp;
char *opcode_initiation_int, *opcode_initiation_fp, *opcode_initiation_dp;
+char *cdp_latency_str;
+unsigned cdp_latency[4];
void ptx_opcocde_latency_options (option_parser_t opp) {
option_parser_register(opp, "-ptx_opcode_latency_int", OPT_CSTR, &opcode_latency_int,
@@ -90,6 +92,11 @@ void ptx_opcocde_latency_options (option_parser_t opp) {
"Opcode initiation intervals for double precision floating points <ADD,MAX,MUL,MAD,DIV>"
"Default 8,8,8,8,130",
"8,8,8,8,130");
+ option_parser_register(opp, "-cdp_latency", OPT_CSTR, &cdp_latency_str,
+ "CDP API latency <cudaGetParameterBufferV2, cudaStreamCreateWithFlags, \
+ cudaLaunchDeviceV2_initCTA, cudaLaunchDevicV2_perKernel>"
+ "Default 1,7200,19320,1680",
+ "1,7200,19320,1680");
}
static address_type get_converge_point(address_type pc);
@@ -609,6 +616,8 @@ void ptx_instruction::set_opcode_and_latency()
sscanf(opcode_initiation_dp, "%u,%u,%u,%u,%u",
&dp_init[0],&dp_init[1],&dp_init[2],
&dp_init[3],&dp_init[4]);
+ sscanf(cdp_latency_str, "%u,%u,%u,%u",
+ &cdp_latency[0],&cdp_latency[1],&cdp_latency[2], &cdp_latency[3]);
if(!m_operands.empty()){
std::vector<operand_info>::iterator it;
@@ -639,19 +648,21 @@ void ptx_instruction::set_opcode_and_latency()
case MEMBAR_OP: op = MEMORY_BARRIER_OP; break;
case CALL_OP:
{
- if(m_is_printf || m_is_cdp)
+ if(m_is_printf || m_is_cdp) {
op = ALU_OP;
+ }
else
op = CALL_OPS;
break;
}
case CALLP_OP:
{
- if(m_is_printf || m_is_cdp)
+ if(m_is_printf || m_is_cdp) {
op = ALU_OP;
- else
- op = CALL_OPS;
- break;
+ }
+ else
+ op = CALL_OPS;
+ break;
}
case RET_OP: case RETP_OP: op = RET_OPS;break;
case ADD_OP: case ADDP_OP: case ADDC_OP: case SUB_OP: case SUBC_OP:
diff --git a/src/cuda-sim/ptx_ir.cc b/src/cuda-sim/ptx_ir.cc
index 176eb14..4931213 100644
--- a/src/cuda-sim/ptx_ir.cc
+++ b/src/cuda-sim/ptx_ir.cc
@@ -1241,10 +1241,12 @@ ptx_instruction::ptx_instruction( int opcode,
if (fname =="vprintf"){
m_is_printf = true;
}
- if (fname == "cudaGetParameterBufferV2"
- || fname == "cudaLaunchDeviceV2"
- || fname == "cudaStreamCreateWithFlags")
- m_is_cdp = true;
+ if(fname == "cudaGetParameterBufferV2")
+ m_is_cdp = 1;
+ if(fname == "cudaStreamCreateWithFlags")
+ m_is_cdp = 2;
+ if(fname == "cudaLaunchDeviceV2")
+ m_is_cdp = 3;
}
}