diff options
| author | Tor Aamodt <[email protected]> | 2010-10-24 00:36:19 -0800 |
|---|---|---|
| committer | Tor Aamodt <[email protected]> | 2010-10-24 00:36:19 -0800 |
| commit | 6eee7514ea8b72fbecd761c50ccfd3394edf2307 (patch) | |
| tree | 1260a88984124f960251dba47142e950f4367be2 /src/gpgpu-sim/addrdec.cc | |
| parent | 4da926e61569a069bac229e8ba649e600fc78a04 (diff) | |
1. adding top level configuration class and making shader and memory configuration
components of this class.
2. clock memory pipeline no. subwarp times for each shader clock and increase
rob-size for texture cache (trying to improve correlation, currently at 0.9218)
3. start to modify shader stats to add back features for visualizer (warp
divergence distribution kind of working again)
passing cuda 3.1 regression and ptxplus correlation tests
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7909]
Diffstat (limited to 'src/gpgpu-sim/addrdec.cc')
| -rw-r--r-- | src/gpgpu-sim/addrdec.cc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/gpgpu-sim/addrdec.cc b/src/gpgpu-sim/addrdec.cc index 464aff0..f6f5018 100644 --- a/src/gpgpu-sim/addrdec.cc +++ b/src/gpgpu-sim/addrdec.cc @@ -93,6 +93,9 @@ void linear_to_raw_address_translation::addrdec_setoption(option_parser_t opp) option_parser_register(opp, "-gpgpu_mem_addr_mapping", OPT_CSTR, &addrdec_option, "mapping memory address to dram model {dramid@<start bit>;<memory address map>}", NULL); + option_parser_register(opp, "-gpgpu_mem_address_mask", OPT_INT32, &gpgpu_mem_address_mask, + "0 = old addressing mask, 1 = new addressing mask, 2 = new add. mask + flipped bank sel and chip sel bits", + "0"); } new_addr_type linear_to_raw_address_translation::partition_address( new_addr_type addr ) const |