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authorTor Aamodt <[email protected]>2010-08-08 23:04:47 -0800
committerTor Aamodt <[email protected]>2010-08-08 23:04:47 -0800
commit529b3a65b65536e20f6a1dab135233f52d19bcf3 (patch)
treebafc1fc006fb131f6d9bf2eae19571b4902121e2 /src/gpgpu-sim/dram_sched.cc
parenta1acb8ed114e6ed00c742e7fd7bcbbe216f909c1 (diff)
refactoring: continued, builds
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7174]
Diffstat (limited to 'src/gpgpu-sim/dram_sched.cc')
-rw-r--r--src/gpgpu-sim/dram_sched.cc4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/gpgpu-sim/dram_sched.cc b/src/gpgpu-sim/dram_sched.cc
index 03cc3ba..7e8b38c 100644
--- a/src/gpgpu-sim/dram_sched.cc
+++ b/src/gpgpu-sim/dram_sched.cc
@@ -74,10 +74,6 @@ extern unsigned max_mrq_latency;
extern unsigned mrq_lat_table[24];
extern int gpgpu_memlatency_stat;
extern unsigned int **concurrent_row_access; //concurrent_row_access[dram chip id][bank id]
-extern unsigned int **row_access; //concurrent_row_access[dram chip id][bank id]
-extern unsigned int **num_activates; //num_activates[dram chip id][bank id]
-extern unsigned int **max_conc_access2samerow; //max_conc_access2samerow[dram chip id][bank id]
-extern unsigned int **max_servicetime2samerow;
ideal_dram_scheduler::ideal_dram_scheduler( dram_t *dm )
{