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authorNick <[email protected]>2019-09-13 07:48:08 -0400
committerNick <[email protected]>2019-09-13 07:48:08 -0400
commit9b1e6dba9f721c772e801abc4851a88aa61929da (patch)
treeed12425be898e85e01e7a3997a9b8d5efba6ef50 /src/gpgpu-sim/dram_sched.h
parent5c99f0fa58caf45f4d457894413aa11c03afdb7d (diff)
Revert "Add src/gpgpu-sim formatting"
This reverts commit 9c9b1341613e767f306b2b73b5b8a5317b6ee563.
Diffstat (limited to 'src/gpgpu-sim/dram_sched.h')
-rw-r--r--src/gpgpu-sim/dram_sched.h68
1 files changed, 33 insertions, 35 deletions
diff --git a/src/gpgpu-sim/dram_sched.h b/src/gpgpu-sim/dram_sched.h
index e003075..63f5831 100644
--- a/src/gpgpu-sim/dram_sched.h
+++ b/src/gpgpu-sim/dram_sched.h
@@ -7,16 +7,14 @@
//
// Redistributions of source code must retain the above copyright notice, this
// list of conditions and the following disclaimer.
-// Redistributions in binary form must reproduce the above copyright notice,
-// this
+// Redistributions in binary form must reproduce the above copyright notice, this
// list of conditions and the following disclaimer in the documentation and/or
// other materials provided with the distribution.
// Neither the name of The University of British Columbia nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-// AND
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
@@ -30,45 +28,45 @@
#ifndef dram_sched_h_INCLUDED
#define dram_sched_h_INCLUDED
-#include <list>
-#include <map>
#include "dram.h"
-#include "gpu-misc.h"
-#include "gpu-sim.h"
#include "shader.h"
+#include "gpu-sim.h"
+#include "gpu-misc.h"
+#include <list>
+#include <map>
-enum memory_mode { READ_MODE = 0, WRITE_MODE };
+enum memory_mode {
+ READ_MODE = 0,
+ WRITE_MODE
+};
class frfcfs_scheduler {
- public:
- frfcfs_scheduler(const memory_config *config, dram_t *dm,
- memory_stats_t *stats);
- void add_req(dram_req_t *req);
- void data_collection(unsigned bank);
- dram_req_t *schedule(unsigned bank, unsigned curr_row);
- void print(FILE *fp);
- unsigned num_pending() const { return m_num_pending; }
- unsigned num_write_pending() const { return m_num_write_pending; }
+public:
+ frfcfs_scheduler( const memory_config *config, dram_t *dm, memory_stats_t *stats );
+ void add_req( dram_req_t *req );
+ void data_collection(unsigned bank);
+ dram_req_t *schedule( unsigned bank, unsigned curr_row );
+ void print( FILE *fp );
+ unsigned num_pending() const { return m_num_pending;}
+ unsigned num_write_pending() const { return m_num_write_pending;}
- private:
- const memory_config *m_config;
- dram_t *m_dram;
- unsigned m_num_pending;
- unsigned m_num_write_pending;
- std::list<dram_req_t *> *m_queue;
- std::map<unsigned, std::list<std::list<dram_req_t *>::iterator> > *m_bins;
- std::list<std::list<dram_req_t *>::iterator> **m_last_row;
- unsigned *curr_row_service_time; // one set of variables for each bank.
- unsigned *row_service_timestamp; // tracks when scheduler began servicing
- // current row
+private:
+ const memory_config *m_config;
+ dram_t *m_dram;
+ unsigned m_num_pending;
+ unsigned m_num_write_pending;
+ std::list<dram_req_t*> *m_queue;
+ std::map<unsigned,std::list<std::list<dram_req_t*>::iterator> > *m_bins;
+ std::list<std::list<dram_req_t*>::iterator> **m_last_row;
+ unsigned *curr_row_service_time; //one set of variables for each bank.
+ unsigned *row_service_timestamp; //tracks when scheduler began servicing current row
- std::list<dram_req_t *> *m_write_queue;
- std::map<unsigned, std::list<std::list<dram_req_t *>::iterator> >
- *m_write_bins;
- std::list<std::list<dram_req_t *>::iterator> **m_last_write_row;
+ std::list<dram_req_t*> *m_write_queue;
+ std::map<unsigned,std::list<std::list<dram_req_t*>::iterator> > *m_write_bins;
+ std::list<std::list<dram_req_t*>::iterator> **m_last_write_row;
- enum memory_mode m_mode;
- memory_stats_t *m_stats;
+ enum memory_mode m_mode;
+ memory_stats_t *m_stats;
};
#endif