summaryrefslogtreecommitdiff
path: root/src/gpgpu-sim/gpu-cache.cc
diff options
context:
space:
mode:
authorTim Rogers <[email protected]>2019-08-26 14:57:01 -0400
committerGitHub <[email protected]>2019-08-26 14:57:01 -0400
commit6be23a1b36a3311c7dafc45a5e692e38cb351337 (patch)
tree65583782519448ef56e6b60e8067d94526f2b149 /src/gpgpu-sim/gpu-cache.cc
parentfd91575e7dcc40653ea0279ef33d845d1d473ffa (diff)
parenta168a2c7224ea59c9ea7523be1f46893531bdc63 (diff)
Merge pull request #27 from mkhairy/dev
Merging a few latency fixes in the memory system
Diffstat (limited to 'src/gpgpu-sim/gpu-cache.cc')
-rw-r--r--src/gpgpu-sim/gpu-cache.cc8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc
index 1705821..d034303 100644
--- a/src/gpgpu-sim/gpu-cache.cc
+++ b/src/gpgpu-sim/gpu-cache.cc
@@ -64,6 +64,14 @@ const char * cache_fail_status_str(enum cache_reservation_fail_reason status)
return static_cache_reservation_fail_reason_str[status];
}
+unsigned l1d_cache_config::set_bank(new_addr_type addr) const{
+
+ if(m_cache_type == SECTOR)
+ return (addr >> m_sector_sz_log2) & (l1_banks-1);
+ else
+ return (addr >> m_line_sz_log2) & (l1_banks-1);
+}
+
unsigned l1d_cache_config::set_index(new_addr_type addr) const{
unsigned set_index = m_nset; // Default to linear set index function
unsigned lower_xor = 0;