diff options
| author | Nick <[email protected]> | 2019-09-13 08:02:14 -0400 |
|---|---|---|
| committer | Nick <[email protected]> | 2019-09-13 08:02:14 -0400 |
| commit | f2aa87a330dc68207088bf60828376f9fa454d72 (patch) | |
| tree | c329fe2a9b754de23acc8dc99e9d3e5d44139e1d /src/gpgpu-sim/gpu-cache.cc | |
| parent | a34a4baad45a40840308167307c79371b4024a9d (diff) | |
Seems like multiple passes for reformatting comments
Diffstat (limited to 'src/gpgpu-sim/gpu-cache.cc')
| -rw-r--r-- | src/gpgpu-sim/gpu-cache.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc index 156c174..76f9aef 100644 --- a/src/gpgpu-sim/gpu-cache.cc +++ b/src/gpgpu-sim/gpu-cache.cc @@ -1329,8 +1329,8 @@ enum cache_request_status data_cache::wr_miss_wa_fetch_on_write( if (mf->get_access_byte_mask().count() == m_config.get_atom_sz()) { // if the request writes to the whole cache line/sector, then, write and set - // cache line Modified. and no need to send read request to memory or reserve - // mshr + // cache line Modified. and no need to send read request to memory or + // reserve mshr if (miss_queue_full(0)) { m_stats.inc_fail_stats(mf->get_access_type(), MISS_QUEUE_FULL); |