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authorJRPAN <[email protected]>2021-05-20 20:52:06 -0400
committerJRPAN <[email protected]>2021-05-20 20:52:06 -0400
commitf665ad5a49620b47118cbf6d578b469155e2a500 (patch)
treee854dfce73d6b88c84d5920d91f6dc54f2b6ab1f /src/gpgpu-sim/gpu-cache.cc
parentc8eca04403d3acaff413788e342fd6aadd122948 (diff)
L2 breakdown - reuse mf allocator
Diffstat (limited to 'src/gpgpu-sim/gpu-cache.cc')
-rw-r--r--src/gpgpu-sim/gpu-cache.cc10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc
index 297a94c..23c5592 100644
--- a/src/gpgpu-sim/gpu-cache.cc
+++ b/src/gpgpu-sim/gpu-cache.cc
@@ -1338,7 +1338,7 @@ enum cache_request_status data_cache::wr_miss_wa_naive(
evicted.m_block_addr,m_wrbk_type,
mf->get_access_warp_mask(), evicted.m_byte_mask,
evicted.m_sector_mask, evicted.m_modified_size,
- true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle);
+ true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle,-1,-1,-1,NULL);
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
@@ -1391,7 +1391,7 @@ enum cache_request_status data_cache::wr_miss_wa_fetch_on_write(
evicted.m_block_addr,m_wrbk_type,
mf->get_access_warp_mask(), evicted.m_byte_mask,
evicted.m_sector_mask, evicted.m_modified_size,
- true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle);
+ true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle,-1,-1,-1,NULL);
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
@@ -1464,7 +1464,7 @@ enum cache_request_status data_cache::wr_miss_wa_fetch_on_write(
evicted.m_block_addr,m_wrbk_type,
mf->get_access_warp_mask(), evicted.m_byte_mask,
evicted.m_sector_mask, evicted.m_modified_size,
- true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle);
+ true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle,-1,-1,-1,NULL);
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
@@ -1549,7 +1549,7 @@ enum cache_request_status data_cache::wr_miss_wa_lazy_fetch_on_read(
evicted.m_block_addr,m_wrbk_type,
mf->get_access_warp_mask(), evicted.m_byte_mask,
evicted.m_sector_mask, evicted.m_modified_size,
- true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle);
+ true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle,-1,-1,-1,NULL);
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);
@@ -1631,7 +1631,7 @@ enum cache_request_status data_cache::rd_miss_base(
evicted.m_block_addr,m_wrbk_type,
mf->get_access_warp_mask(), evicted.m_byte_mask,
evicted.m_sector_mask, evicted.m_modified_size,
- true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle);
+ true, m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle,-1,-1,-1,NULL);
// the evicted block may have wrong chip id when advanced L2 hashing is
// used, so set the right chip address from the original mf
wb->set_chip(mf->get_tlx_addr().chip);