summaryrefslogtreecommitdiff
path: root/src/gpgpu-sim/gpu-misc.cc
diff options
context:
space:
mode:
authorNick <[email protected]>2019-09-13 05:31:29 -0400
committerNick <[email protected]>2019-09-13 05:31:29 -0400
commit9c9b1341613e767f306b2b73b5b8a5317b6ee563 (patch)
treedbdd4b0edd3e587f3ab5fc2d6a00dda4ddb7c444 /src/gpgpu-sim/gpu-misc.cc
parent26ca8de4a6ec9bfe422a14cbe325a5f257df453b (diff)
Add src/gpgpu-sim formatting
Diffstat (limited to 'src/gpgpu-sim/gpu-misc.cc')
-rw-r--r--src/gpgpu-sim/gpu-misc.cc36
1 files changed, 24 insertions, 12 deletions
diff --git a/src/gpgpu-sim/gpu-misc.cc b/src/gpgpu-sim/gpu-misc.cc
index df042b1..e389df3 100644
--- a/src/gpgpu-sim/gpu-misc.cc
+++ b/src/gpgpu-sim/gpu-misc.cc
@@ -7,14 +7,16 @@
//
// Redistributions of source code must retain the above copyright notice, this
// list of conditions and the following disclaimer.
-// Redistributions in binary form must reproduce the above copyright notice, this
+// Redistributions in binary form must reproduce the above copyright notice,
+// this
// list of conditions and the following disclaimer in the documentation and/or
// other materials provided with the distribution.
// Neither the name of The University of British Columbia nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND
// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
@@ -27,17 +29,27 @@
#include "gpu-misc.h"
-unsigned int LOGB2( unsigned int v ) {
- unsigned int shift;
- unsigned int r;
+unsigned int LOGB2(unsigned int v) {
+ unsigned int shift;
+ unsigned int r;
- r = 0;
+ r = 0;
- shift = (( v & 0xFFFF0000) != 0 ) << 4; v >>= shift; r |= shift;
- shift = (( v & 0xFF00 ) != 0 ) << 3; v >>= shift; r |= shift;
- shift = (( v & 0xF0 ) != 0 ) << 2; v >>= shift; r |= shift;
- shift = (( v & 0xC ) != 0 ) << 1; v >>= shift; r |= shift;
- shift = (( v & 0x2 ) != 0 ) << 0; v >>= shift; r |= shift;
+ shift = ((v & 0xFFFF0000) != 0) << 4;
+ v >>= shift;
+ r |= shift;
+ shift = ((v & 0xFF00) != 0) << 3;
+ v >>= shift;
+ r |= shift;
+ shift = ((v & 0xF0) != 0) << 2;
+ v >>= shift;
+ r |= shift;
+ shift = ((v & 0xC) != 0) << 1;
+ v >>= shift;
+ r |= shift;
+ shift = ((v & 0x2) != 0) << 0;
+ v >>= shift;
+ r |= shift;
- return r;
+ return r;
}