diff options
| author | Andrew M. B. Boktor <[email protected]> | 2012-04-23 14:00:25 -0800 |
|---|---|---|
| committer | Andrew Boktor <[email protected]> | 2014-08-14 13:19:05 -0700 |
| commit | 0d717f7c9409a68dd6e2c65eaa86fee1a2019dcc (patch) | |
| tree | 42fda4f724e87351b7733ed25fb7b6cb69012986 /src/gpgpu-sim/gpu-sim.cc | |
| parent | 70c5cf131f49275dd572c002ee287bdcdadff69e (diff) | |
This changelist adds the following:
1. A configurable number of functional units within each SM
2. A configurable pipeline widths (i.e. Issue width, writeback width ...).
Merging
//depot/gpgpu_sim_research/fermi_replay/distribution/src/...
to //depot/gpgpu_sim_research/fermi/distribution/src/...
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12091]
Diffstat (limited to 'src/gpgpu-sim/gpu-sim.cc')
| -rw-r--r-- | src/gpgpu-sim/gpu-sim.cc | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index c33ef17..83c57b2 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -245,6 +245,19 @@ void shader_core_config::reg_options(class OptionParser * opp) option_parser_register(opp, "-gpgpu_simt_core_sim_order", OPT_INT32, &simt_core_sim_order, "Select the simulation order of cores in a cluster (0=Fix, 1=Round-Robin)", "1"); + option_parser_register(opp, "-gpgpu_pipeline_widths", OPT_CSTR, &pipeline_widths_string, + "Pipeline widths " + "ID_OC_SP,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_SFU,OC_EX_MEM,EX_WB", + "1,1,1,1,1,1,1" ); + option_parser_register(opp, "-gpgpu_num_sp_units", OPT_INT32, &gpgpu_num_sp_units, + "Number of SP units (default=1)", + "1"); + option_parser_register(opp, "-gpgpu_num_sfu_units", OPT_INT32, &gpgpu_num_sfu_units, + "Number of SF units (default=1)", + "1"); + option_parser_register(opp, "-gpgpu_num_mem_units", OPT_INT32, &gpgpu_num_mem_units, + "Number if ldst units (default=1) WARNING: not hooked up to anything", + "1"); } void gpgpu_sim_config::reg_options(option_parser_t opp) |