summaryrefslogtreecommitdiff
path: root/src/gpgpu-sim/gpu-sim.cc
diff options
context:
space:
mode:
authorMahmoud <[email protected]>2019-08-26 12:47:04 -0400
committerMahmoud <[email protected]>2019-08-26 12:47:04 -0400
commit62ea81517c57bd49c6811f0bde582c553634b66f (patch)
tree8131f68d21643d283043b15fc6c9827785a356d1 /src/gpgpu-sim/gpu-sim.cc
parent0df569774615120c76fb5f139f8698175a722293 (diff)
parentda0c8dff3b4e89acaf2f2dd31bf8940ab4a1e71c (diff)
Merge branch 'dev-nvidia' into dev-private
Diffstat (limited to 'src/gpgpu-sim/gpu-sim.cc')
-rw-r--r--src/gpgpu-sim/gpu-sim.cc9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 622b8bd..f146e7f 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -239,9 +239,12 @@ void shader_core_config::reg_options(class OptionParser * opp)
"per-shader L1 data cache config "
" {<nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>,<mshr>:<N>:<merge>,<mq> | none}",
"none" );
+ option_parser_register(opp, "-l1_banks", OPT_UINT32, &m_L1D_config.l1_banks,
+ "The number of L1 cache banks",
+ "1");
option_parser_register(opp, "-l1_latency", OPT_UINT32, &m_L1D_config.l1_latency,
"L1 Hit Latency",
- "0");
+ "1");
option_parser_register(opp, "-smem_latency", OPT_UINT32, &smem_latency,
"smem Latency",
"3");
@@ -302,8 +305,8 @@ void shader_core_config::reg_options(class OptionParser * opp)
option_parser_register(opp, "-gpgpu_shmem_size", OPT_UINT32, &gpgpu_shmem_size,
"Size of shared memory per shader core (default 16kB)",
"16384");
- option_parser_register(opp, "-adaptive_volta_cache_config", OPT_BOOL, &adaptive_volta_cache_config,
- "adaptive_volta_cache_config",
+ option_parser_register(opp, "-adaptive_cache_config", OPT_BOOL, &adaptive_volta_cache_config,
+ "adaptive_cache_config",
"0");
option_parser_register(opp, "-gpgpu_shmem_sizeDefault", OPT_UINT32, &gpgpu_shmem_sizeDefault,
"Size of shared memory per shader core (default 16kB)",