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authorTor Aamodt <[email protected]>2010-10-24 09:56:14 -0800
committerTor Aamodt <[email protected]>2010-10-24 09:56:14 -0800
commit9ce235efd70782eba687da0f3163ff0f3f2840ef (patch)
treee44be5be27f12a1b631e44d09be5f044501206d2 /src/gpgpu-sim/gpu-sim.cc
parent6eee7514ea8b72fbecd761c50ccfd3394edf2307 (diff)
add back per shader icount tracking for visualizer
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7910]
Diffstat (limited to 'src/gpgpu-sim/gpu-sim.cc')
-rw-r--r--src/gpgpu-sim/gpu-sim.cc7
1 files changed, 2 insertions, 5 deletions
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index e31ab67..8c1be87 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -336,7 +336,6 @@ gpgpu_sim::gpgpu_sim( const gpgpu_sim_config &config )
gpu_sim_insn = 0;
gpu_tot_sim_insn = 0;
gpu_tot_issued_cta = 0;
- gpu_tot_completed_thread = 0;
gpu_deadlock = false;
m_cluster = new simt_core_cluster*[m_shader_config->n_simt_clusters];
@@ -489,7 +488,6 @@ unsigned int gpgpu_sim::run_gpu_sim()
m_memory_stats->memlatstat_lat_pw(m_config.num_shader(),m_shader_config->n_thread_per_shader,m_shader_config->warp_size);
gpu_tot_sim_cycle += gpu_sim_cycle;
gpu_tot_sim_insn += gpu_sim_insn;
- gpu_tot_completed_thread += m_shader_stats->get_gpu_completed_thread();
ptx_file_line_stats_write_file();
@@ -545,7 +543,6 @@ void gpgpu_sim::gpu_print_stat() const
printf("gpu_tot_sim_cycle = %lld\n", gpu_tot_sim_cycle);
printf("gpu_tot_sim_insn = %lld\n", gpu_tot_sim_insn);
printf("gpu_tot_ipc = %12.4f\n", (float)gpu_tot_sim_insn / gpu_tot_sim_cycle);
- printf("gpu_tot_completed_thread = %lld\n", gpu_tot_completed_thread);
printf("gpu_tot_issued_cta = %lld\n", gpu_tot_issued_cta);
// performance counter for stalls due to congestion.
@@ -666,14 +663,14 @@ void shader_core_ctx::issue_block2core( kernel_info_t &kernel )
// now that we know which warps are used in this CTA, we can allocate
// resources for use in CTA-wide barrier operations
- allocate_barrier( free_cta_hw_id, warps );
+ m_barriers.allocate_barrier(free_cta_hw_id,warps);
// initialize the SIMT stacks and fetch hardware
init_warps( free_cta_hw_id, start_thread, end_thread);
m_n_active_cta++;
shader_CTA_count_log(m_sid, 1);
- printf("GPGPU-Sim uArch: core:%d, cta:%u initialized @(%lld,%lld)\n", m_sid, free_cta_hw_id, gpu_sim_cycle, gpu_tot_sim_cycle );
+ printf("GPGPU-Sim uArch: core:%3d, cta:%2u initialized @(%lld,%lld)\n", m_sid, free_cta_hw_id, gpu_sim_cycle, gpu_tot_sim_cycle );
}
///////////////////////////////////////////////////////////////////////////////////////////