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authorTor Aamodt <[email protected]>2010-08-08 23:57:43 -0800
committerTor Aamodt <[email protected]>2010-08-08 23:57:43 -0800
commit06d6f3bb15f4c1dc56943304696ac83b36413907 (patch)
tree95ea0c28ede4f251f8ad8e2aef0d06f5c37087bb /src/gpgpu-sim/gpu-sim.h
parent529b3a65b65536e20f6a1dab135233f52d19bcf3 (diff)
refactor: shader.cc free of extern declarations
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7176]
Diffstat (limited to 'src/gpgpu-sim/gpu-sim.h')
-rw-r--r--src/gpgpu-sim/gpu-sim.h39
1 files changed, 39 insertions, 0 deletions
diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h
index d962111..58ff4de 100644
--- a/src/gpgpu-sim/gpu-sim.h
+++ b/src/gpgpu-sim/gpu-sim.h
@@ -126,12 +126,51 @@ extern unsigned int gpu_n_shader;
extern unsigned int gpu_n_mem;
extern bool gpgpu_reg_bankconflict;
extern int gpgpu_dram_sched_queue_size;
+extern unsigned long long gpu_sim_cycle;
extern unsigned long long gpu_tot_sim_cycle;
+extern unsigned long long gpu_sim_insn;
extern unsigned int gpu_n_warp_per_shader;
extern unsigned int **max_conc_access2samerow;
extern unsigned int **max_servicetime2samerow;
extern unsigned int **row_access;
extern unsigned int **num_activates;
+extern struct dram_timing **dram;
+extern int *num_warps_issuable;
+extern int *num_warps_issuable_pershader;
+extern unsigned long long gpu_sim_insn_no_ld_const;
+extern unsigned long long gpu_sim_insn_last_update;
+extern unsigned long long gpu_completed_thread;
+extern class shader_core_ctx **sc;
+extern unsigned int gpgpu_pre_mem_stages;
+extern unsigned int gpgpu_no_divg_load;
+extern unsigned int gpgpu_thread_swizzling;
+extern unsigned int gpgpu_strict_simd_wrbk;
+extern unsigned int warp_conflict_at_writeback;
+extern unsigned int gpgpu_commit_pc_beyond_two;
+extern int gpgpu_spread_blocks_across_cores;
+extern int gpgpu_cflog_interval;
+extern unsigned int gpu_stall_by_MSHRwb;
+extern unsigned int gpu_stall_shd_mem;
+extern unsigned int gpu_stall_sh2icnt;
+extern int gpgpu_operand_collector;
+extern int gpu_runtime_stat_flag;
+extern unsigned int *max_return_queue_length;
+extern int gpgpu_partial_write_mask;
+extern int gpgpu_n_mem_write_local;
+extern int gpgpu_n_mem_write_global;
+extern int gpgpu_cache_wt_through;
+extern double core_freq;
+extern double icnt_freq;
+extern double dram_freq;
+extern double l2_freq;
+extern int pdom_sched_type;
+extern int n_pdom_sc_orig_stat;
+extern int n_pdom_sc_single_stat;
+extern int gpgpu_cuda_sim;
+
+#ifndef MhZ
+ #define MhZ *1000000
+#endif
extern void check_time_vector_update(unsigned int uid,int slot ,long int latency,int type);