diff options
| author | Tor Aamodt <[email protected]> | 2010-10-05 13:34:47 -0800 |
|---|---|---|
| committer | Tor Aamodt <[email protected]> | 2010-10-05 13:34:47 -0800 |
| commit | e0f1b4359832ba2952ddcff3a400cd7e1e3d02b5 (patch) | |
| tree | 12f3dbd8366e15b4a9a299b0368df6fafea11847 /src/gpgpu-sim/gpu-sim.h | |
| parent | d859e08188eb5863888a9b018cf4aec6d0419c40 (diff) | |
broken change list: builds, but does not run, yet
refactoring: create warp_inst_t that provides notion of a group of scalar instructions
traveling down the pipeline.
delete DWF
delete MIMD
delete warp_tracker
delete old writeback stage, replace it with a stub that just writes back everything
delete old pipeline model
current status: MSHR's need to change to deal with the new structure
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7814]
Diffstat (limited to 'src/gpgpu-sim/gpu-sim.h')
| -rw-r--r-- | src/gpgpu-sim/gpu-sim.h | 11 |
1 files changed, 1 insertions, 10 deletions
diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h index 081cacf..fab1ab8 100644 --- a/src/gpgpu-sim/gpu-sim.h +++ b/src/gpgpu-sim/gpu-sim.h @@ -98,8 +98,6 @@ enum divergence_support_t { POST_DOMINATOR = 1, - MIMD = 2, - DWF = 3, NUM_SIMD_MODEL }; @@ -123,8 +121,6 @@ struct shader_core_config bool gpgpu_operand_collector; int gpgpu_operand_collector_num_units; int gpgpu_operand_collector_num_units_sfu; - unsigned gpgpu_pre_mem_stages; - bool gpgpu_no_divg_load; bool gpgpu_stall_on_use; bool gpgpu_cache_wt_through; //Shader core resources @@ -145,9 +141,6 @@ struct shader_core_config int gpgpu_coalesce_arch; bool gpgpu_local_mem_map; int gpu_padded_cta_size; - unsigned gpgpu_dwf_rr_stage_n_reg_banks; - int m_using_dwf_rrstage; // model register read bank conflicts in DWF (i.e., not "lane aware") - int using_commit_queue; //is the scheduler using commit_queue? }; enum dram_ctrl_t { @@ -173,8 +166,6 @@ struct memory_config { extern int gpgpu_mem_address_mask; extern unsigned int gpu_n_mem_per_ctrlr; -extern bool gpgpu_thread_swizzling; - extern int gpu_runtime_stat_flag; extern int gpgpu_cflog_interval; @@ -214,7 +205,7 @@ public: unsigned num_shader() const { return m_n_shader; } unsigned threads_per_core() const; - void mem_instruction_stats( class inst_t* warp); + void mem_instruction_stats( class warp_inst_t* warp); int issue_mf_from_fq(class mem_fetch *mf); void gpu_print_stat() const; |