Fixing L2 WriteBack bug caused by using the partition address for both set index generation and storing tag/block address.

- Added l2_cache_config class to extend the baseline
- Allow custom set_index per cache. Modified L2 set_index function to use the memory partition address
- Modified the cache tag to now be tag+set_index (same as the block address). Useful for more complex set index generation functions that can allow different indexes to map to the same set.

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15182]

1 files changed, 1 insertions, 1 deletions

diff --git a/src/gpgpu-sim/l2cache.cc b/src/gpgpu-sim/l2cache.cc
index 56b145c..21f837d 100644
--- a/src/gpgpu-sim/l2cache.cc
+++ b/src/gpgpu-sim/l2cache.cc
@@ -145,7 +145,7 @@ void memory_partition_unit::cache_cycle( unsigned cycle )
             // L2 is enabled and access is for L2
             if ( !m_L2_icnt_queue->full() ) {
                 std::list<cache_event> events;
-                enum cache_request_status status = m_L2cache->access(mf->get_partition_addr(),mf,gpu_sim_cycle+gpu_tot_sim_cycle,events);
+                enum cache_request_status status = m_L2cache->access(mf->get_addr(),mf,gpu_sim_cycle+gpu_tot_sim_cycle,events);
                 bool write_sent = was_write_sent(events);
                 bool read_sent = was_read_sent(events);