summaryrefslogtreecommitdiff
path: root/src/gpgpu-sim/mem_fetch.cc
diff options
context:
space:
mode:
authorTor Aamodt <[email protected]>2025-02-10 17:35:31 -0800
committerGitHub <[email protected]>2025-02-10 17:35:31 -0800
commit0e39753a623978eb37bf044b21fde1a5909bff03 (patch)
tree13416ab3a165dde580fe847b06bde7c966482088 /src/gpgpu-sim/mem_fetch.cc
parent6b244a5d3be7811f16c312905c1c7fee137ac7a4 (diff)
parent48af0c94ca6d7b05f800f535b3de4cefafcfa655 (diff)
Merge pull request #313 from accel-sim/dev
Purdue Updates Merging
Diffstat (limited to 'src/gpgpu-sim/mem_fetch.cc')
-rw-r--r--src/gpgpu-sim/mem_fetch.cc29
1 files changed, 18 insertions, 11 deletions
diff --git a/src/gpgpu-sim/mem_fetch.cc b/src/gpgpu-sim/mem_fetch.cc
index 456d891..809c920 100644
--- a/src/gpgpu-sim/mem_fetch.cc
+++ b/src/gpgpu-sim/mem_fetch.cc
@@ -35,10 +35,10 @@
unsigned mem_fetch::sm_next_mf_request_uid = 1;
mem_fetch::mem_fetch(const mem_access_t &access, const warp_inst_t *inst,
- unsigned ctrl_size, unsigned wid, unsigned sid,
- unsigned tpc, const memory_config *config,
- unsigned long long cycle, mem_fetch *m_original_mf,
- mem_fetch *m_original_wr_mf)
+ unsigned long long streamID, unsigned ctrl_size,
+ unsigned wid, unsigned sid, unsigned tpc,
+ const memory_config *config, unsigned long long cycle,
+ mem_fetch *m_original_mf, mem_fetch *m_original_wr_mf)
: m_access(access)
{
@@ -48,14 +48,21 @@ mem_fetch::mem_fetch(const mem_access_t &access, const warp_inst_t *inst,
m_inst = *inst;
assert(wid == m_inst.warp_id());
}
+ m_streamID = streamID;
m_data_size = access.get_size();
m_ctrl_size = ctrl_size;
m_sid = sid;
m_tpc = tpc;
m_wid = wid;
- config->m_address_mapping.addrdec_tlx(access.get_addr(), &m_raw_addr);
- m_partition_addr =
- config->m_address_mapping.partition_address(access.get_addr());
+
+ if (!config->is_SST_mode()) {
+ // In SST memory model, the SST memory hierarchy is
+ // responsible to generate the correct address mapping
+ config->m_address_mapping.addrdec_tlx(access.get_addr(), &m_raw_addr);
+ m_partition_addr =
+ config->m_address_mapping.partition_address(access.get_addr());
+ }
+
m_type = m_access.is_write() ? WRITE_REQUEST : READ_REQUEST;
m_timestamp = cycle;
m_timestamp2 = 0;
@@ -84,10 +91,10 @@ mem_fetch::~mem_fetch() { m_status = MEM_FETCH_DELETED; }
#undef MF_TUP_END
void mem_fetch::print(FILE *fp, bool print_inst) const {
- if (this == NULL) {
- fprintf(fp, " <NULL mem_fetch pointer>\n");
- return;
- }
+ // if (this == NULL) { // doenst make sense!
+ // fprintf(fp, " <NULL mem_fetch pointer>\n");
+ // return;
+ // }
fprintf(fp, " mf: uid=%6u, sid%02u:w%02u, part=%u, ", m_request_uid, m_sid,
m_wid, m_raw_addr.chip);
m_access.print(fp);