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authorTor Aamodt <[email protected]>2010-10-05 13:34:47 -0800
committerTor Aamodt <[email protected]>2010-10-05 13:34:47 -0800
commite0f1b4359832ba2952ddcff3a400cd7e1e3d02b5 (patch)
tree12f3dbd8366e15b4a9a299b0368df6fafea11847 /src/gpgpu-sim/mem_latency_stat.cc
parentd859e08188eb5863888a9b018cf4aec6d0419c40 (diff)
broken change list: builds, but does not run, yet
refactoring: create warp_inst_t that provides notion of a group of scalar instructions traveling down the pipeline. delete DWF delete MIMD delete warp_tracker delete old writeback stage, replace it with a stub that just writes back everything delete old pipeline model current status: MSHR's need to change to deal with the new structure [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7814]
Diffstat (limited to 'src/gpgpu-sim/mem_latency_stat.cc')
-rw-r--r--src/gpgpu-sim/mem_latency_stat.cc6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/gpgpu-sim/mem_latency_stat.cc b/src/gpgpu-sim/mem_latency_stat.cc
index 28e9036..fda42e5 100644
--- a/src/gpgpu-sim/mem_latency_stat.cc
+++ b/src/gpgpu-sim/mem_latency_stat.cc
@@ -170,9 +170,9 @@ unsigned memory_stats_t::memlatstat_done(mem_fetch *mf, unsigned n_warp_per_shad
mf_num_lat_pw_perwarp[wid]++;
mf_tot_lat_pw_perwarp[wid] += mf_latency;
mf_tot_lat_pw += mf_latency;
- if( mf->get_mshr() && mf->get_mshr()->has_inst() )
- check_time_vector_update(mf->get_mshr()->get_insts_uid(),MR_2SH_FQ_POP,mf_latency,mf->get_type());
- mf_lat_table[LOGB2(mf_latency)]++;
+ unsigned idx = LOGB2(mf_latency);
+ assert(idx<32);
+ mf_lat_table[idx]++;
shader_mem_lat_log(mf->get_sid(), mf_latency);
mf_total_lat_table[mf->get_tlx_addr().chip][mf->get_tlx_addr().bk] += mf_latency;
if (mf_latency > max_mf_latency)