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authorWilson Fung <[email protected]>2013-04-11 05:17:09 -0800
committerAndrew Boktor <[email protected]>2014-08-14 13:50:46 -0700
commit918b3ef50790f0ae7c8c079754f7332933572d5b (patch)
tree161654598f0190244978e330173b3828a42a3f2d /src/gpgpu-sim/mem_latency_stat.h
parent3164bfc1910cf17e7dd4033cd07ac264f656336f (diff)
Replaced the legacy L2 cache access stats with more meaningful breakdown that categorize access by their access type (global memory read/write, local memory read/write, instruction read, ... etc.).
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15784]
Diffstat (limited to 'src/gpgpu-sim/mem_latency_stat.h')
-rw-r--r--src/gpgpu-sim/mem_latency_stat.h17
1 files changed, 11 insertions, 6 deletions
diff --git a/src/gpgpu-sim/mem_latency_stat.h b/src/gpgpu-sim/mem_latency_stat.h
index 83114fa..4bfb165 100644
--- a/src/gpgpu-sim/mem_latency_stat.h
+++ b/src/gpgpu-sim/mem_latency_stat.h
@@ -30,6 +30,7 @@
#include <stdio.h>
#include <zlib.h>
+#include <map>
class memory_stats_t {
public:
@@ -39,12 +40,13 @@ public:
unsigned memlatstat_done( class mem_fetch *mf );
void memlatstat_read_done( class mem_fetch *mf );
+ void memlatstat_L2cache_access( class mem_fetch *mf, int access_outcome );
void memlatstat_dram_access( class mem_fetch *mf );
void memlatstat_icnt2mem_pop( class mem_fetch *mf);
void memlatstat_lat_pw();
void memlatstat_print(unsigned n_mem, unsigned gpu_mem_n_bk);
- void print( FILE *fp );
+ void print_L2cache_stats( FILE *fp );
void visualizer_print( gzFile visualizer_file );
unsigned m_n_shader;
@@ -81,11 +83,13 @@ public:
unsigned ***mem_access_type_stats; // dram access type classification
- // stats
- unsigned L2_write_access;
- unsigned L2_write_miss;
- unsigned L2_read_access;
- unsigned L2_read_miss;
+ // L2 cache stats
+ typedef std::map<int, std::map<int, unsigned> > L2CacheAccessBreakdown_t; // <access type, outcome, count>
+ L2CacheAccessBreakdown_t m_L2CacheAccessBreakdown;
+ // unsigned L2_write_access;
+ // unsigned L2_write_miss;
+ // unsigned L2_read_access;
+ // unsigned L2_read_miss;
unsigned int *L2_cbtoL2length;
unsigned int *L2_cbtoL2writelength;
unsigned int *L2_L2tocblength;
@@ -93,6 +97,7 @@ public:
unsigned int *L2_dramtoL2writelength;
unsigned int *L2_L2todramlength;
+ // DRAM access row locality stats
unsigned int **concurrent_row_access; //concurrent_row_access[dram chip id][bank id]
unsigned int **num_activates; //num_activates[dram chip id][bank id]
unsigned int **row_access; //row_access[dram chip id][bank id]