diff options
| author | tgrogers <[email protected]> | 2018-10-07 20:22:49 -0400 |
|---|---|---|
| committer | tgrogers <[email protected]> | 2018-10-07 20:22:49 -0400 |
| commit | 2ca656ae40436929f3d1261acabbd1c13db8470a (patch) | |
| tree | 9ab5081e2b0fccfcd3e62a7f8d7bd3d8750323b7 /src/gpgpu-sim/shader.cc | |
| parent | 1e2d7b4c3147a0371c26bf086024d1cf770ad60c (diff) | |
| parent | 6bea063d90358417b9d95dd17f8c2b88491b7385 (diff) | |
Merge branch 'jain156-dev-purdue-integration' into dev-purdue-integration
Diffstat (limited to 'src/gpgpu-sim/shader.cc')
| -rw-r--r-- | src/gpgpu-sim/shader.cc | 35 |
1 files changed, 34 insertions, 1 deletions
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index 0e2e1c2..80ac07e 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -438,6 +438,22 @@ void shader_core_stats::print( FILE* fout ) const fprintf(fout,"gpgpu_n_mem_texture = %d\n", gpgpu_n_mem_texture); fprintf(fout,"gpgpu_n_mem_const = %d\n", gpgpu_n_mem_const); + fprintf(fout,"gpgpu_mem_divergence_hist "); + gpgpu_mem_divergence_hist->fprint(fout); + fprintf(fout,"\n"); + fprintf(fout,"gpgpu_gmem_ld_divergence_hist "); + gpgpu_gmem_ld_divergence_hist->fprint(fout); + fprintf(fout,"\n"); + fprintf(fout,"gpgpu_gmem_st_divergence_hist "); + gpgpu_gmem_st_divergence_hist->fprint(fout); + fprintf(fout,"\n"); + fprintf(fout,"gpgpu_shmem_divergence_hist "); + gpgpu_shmem_divergence_hist->fprint(fout); + fprintf(fout,"\n"); + fprintf(fout,"warp_inst_classification "); + warp_inst_classification->fprint(fout); + fprintf(fout,"\n"); + fprintf(fout, "gpgpu_n_load_insn = %d\n", gpgpu_n_load_insn); fprintf(fout, "gpgpu_n_store_insn = %d\n", gpgpu_n_store_insn); fprintf(fout, "gpgpu_n_shmem_insn = %d\n", gpgpu_n_shmem_insn); @@ -740,9 +756,26 @@ void shader_core_ctx::fetch() void shader_core_ctx::func_exec_inst( warp_inst_t &inst ) { + unsigned starting_queue_size; execute_warp_inst_t(inst); - if( inst.is_load() || inst.is_store() ) + if (inst.op_classification) { + m_stats->warp_inst_classification->add2bin(inst.op_classification); + } + if( inst.is_load() || inst.is_store() ) { + starting_queue_size = inst.accessq_count(); inst.generate_mem_accesses(); + if ( inst.space.get_type() == global_space ) { + if (inst.is_load()) + m_stats->gpgpu_gmem_ld_divergence_hist->add2bin(inst.accessq_count() - starting_queue_size); + else if (inst.is_store()) + m_stats->gpgpu_gmem_st_divergence_hist->add2bin(inst.accessq_count() - starting_queue_size); + } + else if ( inst.space.get_type() == shared_space ) { + m_stats->gpgpu_shmem_divergence_hist->add2bin(inst.get_cycles()); + } + + m_stats->gpgpu_mem_divergence_hist->add2bin(inst.accessq_count() - starting_queue_size); + } } void shader_core_ctx::issue_warp( register_set& pipe_reg_set, const warp_inst_t* next_inst, const active_mask_t &active_mask, unsigned warp_id ) |