diff options
| author | Tayler Hetherington <[email protected]> | 2012-09-16 13:38:57 -0800 |
|---|---|---|
| committer | Andrew Boktor <[email protected]> | 2014-08-14 13:49:20 -0700 |
| commit | 9ceb6f2016a16aa9c877956fc2e8bc43dc697322 (patch) | |
| tree | 52f22dd215702ad439e73800388a978b8125af8f /src/gpgpu-sim/shader.cc | |
| parent | 960a55b075be901ca14d1878f886bbea73456663 (diff) | |
Modified the cache hierarchy, reorganized code to eliminate code replication, implemented write allocate / write back policies in L2 cache, added configurable parameters in gpgpusim.config ("W" = Write Allocate, "N" = No write allocate -> "P" = Private, "S" = shared), modified the cache configuration lines to always be separated by ":" instead of ":" and ",", and modified L1 and L2 data cache to be "Write Back" caches instead of "Read Only".
Still need to implement Ahmed's sectored cache implementation.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14081]
Diffstat (limited to 'src/gpgpu-sim/shader.cc')
| -rw-r--r-- | src/gpgpu-sim/shader.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index b3e5fc5..7b65add 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -2395,6 +2395,8 @@ void simt_core_cluster::icnt_inject_request_packet(class mem_fetch *mf) case LOCAL_ACC_W: m_stats->gpgpu_n_mem_write_local++; break; case INST_ACC_R: m_stats->gpgpu_n_mem_read_inst++; break; case L1_WRBK_ACC: m_stats->gpgpu_n_mem_write_global++; break; + case L2_WRBK_ACC: m_stats->gpgpu_n_mem_l2_writeback++; break; + case L2_WR_ALLOC_R: m_stats->gpgpu_n_mem_l2_write_allocate++; break; default: assert(0); } unsigned destination = mf->get_tlx_addr().chip; |