diff options
| author | Tor Aamodt <[email protected]> | 2010-10-12 00:46:24 -0800 |
|---|---|---|
| committer | Tor Aamodt <[email protected]> | 2010-10-12 00:46:24 -0800 |
| commit | b0cf792926caf74b393a14e36de676c7afd68164 (patch) | |
| tree | ddcdd107959a1cea591a503e1e73080f14fbfb0f /src/gpgpu-sim/visualizer.cc | |
| parent | b3ce70a797756285ea9b15b3e5cf515d8b6a2b63 (diff) | |
1. adding simt_core_cluster, which models a TPC or (for fermi) GPC...
this gives us a place to stick caches shared among shader cores but
on the shader side of the interconnect... maybe move the clock
boundary code here? after integrating booksim 2 code?
2. added a pending write table to ldst_unit rather than scoreboard
... rationale is that ld/st unit needs to process register writes
once it is done it can notify scoreboard once.
3. re-enabled shared memory delay (use pipeline within ldst_unit)
4. re-enabling operand collector writeback for all instruction types
5. disable MSHRs in this change list
passing CUDA 3.1 regression
next? texture cache, then redo mshrs?
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7845]
Diffstat (limited to 'src/gpgpu-sim/visualizer.cc')
| -rw-r--r-- | src/gpgpu-sim/visualizer.cc | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/gpgpu-sim/visualizer.cc b/src/gpgpu-sim/visualizer.cc index 4474dcd..15dc157 100644 --- a/src/gpgpu-sim/visualizer.cc +++ b/src/gpgpu-sim/visualizer.cc @@ -126,6 +126,7 @@ void gpgpu_sim::visualizer_printstat() gzsetparams(visualizer_file, g_visualizer_zlevel, Z_DEFAULT_STRATEGY); visualizer_first_printstat = false; + /* // instruction count per shader core gzprintf(visualizer_file, "shaderinsncount: "); for (unsigned i=0;i<m_n_shader;i++) @@ -137,6 +138,7 @@ void gpgpu_sim::visualizer_printstat() for (unsigned i=0;i<m_n_shader;i++) gzprintf(visualizer_file, "%u ", m_sc[i]->get_n_diverge()); gzprintf(visualizer_file, "\n"); + */ cflog_visualizer_gzprint(visualizer_file); shader_CTA_count_visualizer_gzprint(visualizer_file); @@ -172,7 +174,7 @@ void gpgpu_sim::visualizer_printstat() m_sc[i]->new_cache_window(); */ - for (unsigned i=0;i<m_n_mem;i++) + for (unsigned i=0;i<m_memory_config->m_n_mem;i++) m_memory_partition_unit[i]->visualizer_print(visualizer_file); // overall cache miss rates @@ -208,7 +210,7 @@ void gpgpu_sim::visualizer_printstat() time_vector_print_interval2gzfile(visualizer_file); gzprintf(visualizer_file, "WarpDivergenceBreakdown:"); unsigned int total=0; - unsigned int cf = (m_shader_config->gpgpu_warpdistro_shader==-1)?m_n_shader:1; + unsigned int cf = (m_shader_config->gpgpu_warpdistro_shader==-1)?num_shader():1; gzprintf(visualizer_file, " %d", (m_shader_stats->shader_cycle_distro[0] - last_shader_cycle_distro[0]) / cf ); gzprintf(visualizer_file, " %d", (m_shader_stats->shader_cycle_distro[2] - last_shader_cycle_distro[2]) / cf ); for (unsigned i=0; i<m_shader_config->warp_size+3; i++) { |