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authoraamir <[email protected]>2018-09-22 15:28:40 -0700
committeraamir <[email protected]>2018-09-22 15:28:40 -0700
commit09e6092ace5213a5d5a49bf80b052802c06a4268 (patch)
tree4cef1b01b7015d5b7c730ef7b4d9589db28ffd7d /src/gpgpu-sim
parent3949357047a621a06b2e7fb4fd6099cce1469d27 (diff)
debug prints
Diffstat (limited to 'src/gpgpu-sim')
-rw-r--r--src/gpgpu-sim/Makefile2
-rw-r--r--src/gpgpu-sim/gpu-sim.cc4
-rw-r--r--src/gpgpu-sim/shader.cc16
-rw-r--r--src/gpgpu-sim/shader.h2
4 files changed, 16 insertions, 8 deletions
diff --git a/src/gpgpu-sim/Makefile b/src/gpgpu-sim/Makefile
index f10a8a4..4f77699 100644
--- a/src/gpgpu-sim/Makefile
+++ b/src/gpgpu-sim/Makefile
@@ -48,7 +48,7 @@ ifeq ($(GNUC_CPP0X), 1)
endif
ifneq ($(DEBUG),1)
- OPTFLAGS += -O3
+ OPTFLAGS += -O0
else
CXXFLAGS +=
endif
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 7a797b5..eba6f54 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -1469,7 +1469,9 @@ void gpgpu_sim::cycle()
if( g_single_step && ((gpu_sim_cycle+gpu_tot_sim_cycle) >= g_single_step) ) {
asm("int $03");
}
- gpu_sim_cycle++;
+ printf("gpu_sim_cycle=%d\n",gpu_sim_cycle);
+ gpu_sim_cycle++;
+
if( g_interactive_debugger_enabled )
gpgpu_debug();
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index e745f03..eeb59bb 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -1321,10 +1321,16 @@ void ldst_unit::get_L1T_sub_stats(struct cache_sub_stats &css) const{
void shader_core_ctx::warp_inst_complete(const warp_inst_t &inst)
{
- #if 0
- printf("[warp_inst_complete] uid=%u core=%u warp=%u pc=%#x @ time=%llu issued@%llu\n",
- inst.get_uid(), m_sid, inst.warp_id(), inst.pc, gpu_tot_sim_cycle + gpu_sim_cycle, inst.get_issue_cycle());
- #endif
+ //#if 0
+ //printf("[warp_inst_complete] uid=%u core=%u warp=%u pc=%#x @ time=%llu issued@%llu\n",
+ //const ptx_instruction *pI = m_func_info->get_instruction(inst.pc);
+ printf("[warp_inst_complete] uid=%u core=%u warp=%u pc=%d @ time=%llu \n",
+ inst.get_uid(), m_sid, inst.warp_id(), inst.pc, gpu_sim_cycle);
+ //printf("^instruction:%s",(pI->m_source).c_str());
+ //inst.get_uid(), m_sid, inst.warp_id(), inst.pc, gpu_tot_sim_cycle + gpu_sim_cycle, inst.get_issue_cycle());
+ //#endif
+
+
if(inst.op_pipe==SP__OP)
m_stats->m_num_sp_committed[m_sid]++;
else if(inst.op_pipe==SFU__OP)
@@ -1510,7 +1516,6 @@ bool ldst_unit::memory_cycle( warp_inst_t &inst, mem_stage_stall_type &stall_rea
if (m_core->get_config()->gmem_skip_L1D)
bypassL1D = true;
}
-
if( bypassL1D ) {
// bypass L1 cache
unsigned control_size = inst.is_store() ? WRITE_PACKET_SIZE : READ_PACKET_SIZE;
@@ -3472,6 +3477,7 @@ void simt_core_cluster::icnt_inject_request_packet(class mem_fetch *mf)
case CONST_ACC_R: m_stats->gpgpu_n_mem_const++; break;
case TEXTURE_ACC_R: m_stats->gpgpu_n_mem_texture++; break;
case GLOBAL_ACC_R: m_stats->gpgpu_n_mem_read_global++; break;
+ //case GLOBAL_ACC_R: m_stats->gpgpu_n_mem_read_global++; printf("read_global%d\n",m_stats->gpgpu_n_mem_read_global); break;
case GLOBAL_ACC_W: m_stats->gpgpu_n_mem_write_global++; break;
case LOCAL_ACC_R: m_stats->gpgpu_n_mem_read_local++; break;
case LOCAL_ACC_W: m_stats->gpgpu_n_mem_write_local++; break;
diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h
index d9558b0..99abb63 100644
--- a/src/gpgpu-sim/shader.h
+++ b/src/gpgpu-sim/shader.h
@@ -1328,7 +1328,7 @@ struct shader_core_config : public core_config
gpgpu_operand_collector_num_in_ports_tensor_core=8;
gpgpu_operand_collector_num_out_ports_tensor_core=8;
- max_vp_core_latency = 64;
+ max_vp_core_latency = 512;
gpgpu_num_vp_core_units=8;
gpgpu_operand_collector_num_units_vp_core=24;
gpgpu_operand_collector_num_in_ports_vp_core=8;