running formatter (#126)

* running formatter

* consolidate CI runs

* use cluster to run formatter

* use cluster to run formatter

* Add a CI-Success step

6 files changed, 40 insertions, 32 deletions

diff --git a/src/gpgpu-sim/dram.cc b/src/gpgpu-sim/dram.cc
index 1e1ad3d..80e20d7 100644
--- a/src/gpgpu-sim/dram.cc
+++ b/src/gpgpu-sim/dram.cc
@@ -684,9 +684,13 @@ bool dram_t::issue_row_command(int j) {
 }
 
 // if mrq is being serviced by dram, gets popped after CL latency fulfilled
-class mem_fetch *dram_t::return_queue_pop() { return returnq->pop(); }
+class mem_fetch *dram_t::return_queue_pop() {
+  return returnq->pop();
+}
 
-class mem_fetch *dram_t::return_queue_top() { return returnq->top(); }
+class mem_fetch *dram_t::return_queue_top() {
+  return returnq->top();
+}
 
 void dram_t::print(FILE *simFile) const {
   unsigned i;
diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h
index 68bdca7..98e52f4 100644
--- a/src/gpgpu-sim/gpu-sim.h
+++ b/src/gpgpu-sim/gpu-sim.h
@@ -879,7 +879,7 @@ class sst_gpgpu_sim : public gpgpu_sim {
    * @param dst_start_addr
    * @param count
    */
-  void perf_memcpy_to_gpu(size_t dst_start_addr, size_t count) {};
+  void perf_memcpy_to_gpu(size_t dst_start_addr, size_t count){};
 
   /**
    * @brief Check if the SST config matches up with the
diff --git a/src/gpgpu-sim/l2cache.h b/src/gpgpu-sim/l2cache.h
index 9d164d7..65c9c38 100644
--- a/src/gpgpu-sim/l2cache.h
+++ b/src/gpgpu-sim/l2cache.h
@@ -106,7 +106,9 @@ class memory_partition_unit {
 
   unsigned get_mpid() const { return m_id; }
 
-  class gpgpu_sim *get_mgpu() const { return m_gpu; }
+  class gpgpu_sim *get_mgpu() const {
+    return m_gpu;
+  }
 
  private:
   unsigned m_id;
diff --git a/src/gpgpu-sim/local_interconnect.cc b/src/gpgpu-sim/local_interconnect.cc
index e4cdaa5..ce4415c 100644
--- a/src/gpgpu-sim/local_interconnect.cc
+++ b/src/gpgpu-sim/local_interconnect.cc
@@ -190,7 +190,7 @@ void xbar_router::iSLIP_Advance() {
       input_nodes.insert(i);
       unsigned out_node = in_buffers[i].front().output_deviceID;
 
-      if(destination_set.find(out_node) != destination_set.end()) {
+      if (destination_set.find(out_node) != destination_set.end()) {
         conflict_sub++;
       }
       destination_set.insert(out_node);
@@ -207,40 +207,40 @@ void xbar_router::iSLIP_Advance() {
   for (auto dest : destination_set) {
     if (Has_Buffer_Out(dest, 1)) {
       unsigned start_node = next_node[dest];
-      auto it = std::upper_bound(input_nodes.begin(), input_nodes.end(),
-                                       start_node);
+      auto it =
+          std::upper_bound(input_nodes.begin(), input_nodes.end(), start_node);
       for (unsigned j = 0; j < input_nodes.size(); j++, it++) {
         if (it == input_nodes.end()) {
           it = input_nodes.begin();
         }
         unsigned node_id = *it;
         assert(!in_buffers[node_id].empty());
-          Packet _packet = in_buffers[node_id].front();
-          if (_packet.output_deviceID == dest) {
-            out_buffers[_packet.output_deviceID].push(_packet);
-            in_buffers[node_id].pop();
-            input_nodes.erase(node_id);  //can only be used once
-            if (verbose)
-              printf("%d : cycle %llu : send req from %d to %d\n", m_id, cycles,
-                     node_id, dest - _n_shader);
-            if (grant_cycles_count == 1)
-              next_node[dest] = (++node_id % total_nodes);
-            if (verbose) {
-              for (unsigned k = j + 1; k < total_nodes; ++k) {
-                unsigned node_id2 = (k + next_node[dest]) % total_nodes;
-                if (!in_buffers[node_id2].empty()) {
-                  Packet _packet2 = in_buffers[node_id2].front();
+        Packet _packet = in_buffers[node_id].front();
+        if (_packet.output_deviceID == dest) {
+          out_buffers[_packet.output_deviceID].push(_packet);
+          in_buffers[node_id].pop();
+          input_nodes.erase(node_id);  // can only be used once
+          if (verbose)
+            printf("%d : cycle %llu : send req from %d to %d\n", m_id, cycles,
+                   node_id, dest - _n_shader);
+          if (grant_cycles_count == 1)
+            next_node[dest] = (++node_id % total_nodes);
+          if (verbose) {
+            for (unsigned k = j + 1; k < total_nodes; ++k) {
+              unsigned node_id2 = (k + next_node[dest]) % total_nodes;
+              if (!in_buffers[node_id2].empty()) {
+                Packet _packet2 = in_buffers[node_id2].front();
 
-                  if (_packet2.output_deviceID == dest)
-                    printf("%d : cycle %llu : cannot send req from %d to %d\n",
-                           m_id, cycles, node_id2, dest - _n_shader);
-                }
+                if (_packet2.output_deviceID == dest)
+                  printf("%d : cycle %llu : cannot send req from %d to %d\n",
+                         m_id, cycles, node_id2, dest - _n_shader);
               }
             }
-
-            reqs++;
-            break;
           }
+
+          reqs++;
+          break;
+        }
       }
     } else {
       out_buffer_full++;
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index 1ea011e..730cb6d 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -891,7 +891,7 @@ void shader_core_ctx::decode() {
     // decode 1 or 2 instructions and place them into ibuffer
     address_type pc = m_inst_fetch_buffer.m_pc;
     const warp_inst_t *pI1 = get_next_inst(m_inst_fetch_buffer.m_warp_id, pc);
-      if (pI1) {
+    if (pI1) {
       m_warp[m_inst_fetch_buffer.m_warp_id]->ibuffer_fill(0, pI1);
       m_warp[m_inst_fetch_buffer.m_warp_id]->inc_inst_in_pipeline();
       m_stats->m_num_decoded_insn[m_sid]++;
diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h
index b90ce2f..5922d24 100644
--- a/src/gpgpu-sim/shader.h
+++ b/src/gpgpu-sim/shader.h
@@ -189,7 +189,7 @@ class shd_warp_t {
     m_active_threads.reset(lane);
     n_completed++;
   }
-  bool test_active(unsigned lane) {return m_active_threads.test(lane);}
+  bool test_active(unsigned lane) { return m_active_threads.test(lane); }
 
   void set_last_fetch(unsigned long long sim_cycle) {
     m_last_fetch = sim_cycle;
@@ -274,7 +274,9 @@ class shd_warp_t {
   unsigned get_dynamic_warp_id() const { return m_dynamic_warp_id; }
   unsigned get_warp_id() const { return m_warp_id; }
 
-  class shader_core_ctx *get_shader() { return m_shader; }
+  class shader_core_ctx *get_shader() {
+    return m_shader;
+  }
 
  private:
   static const unsigned IBUFFER_SIZE = 2;