Fix a bunch of outstanding warnings and undefined behavior

10 files changed, 29 insertions, 32 deletions

diff --git a/src/gpgpu-sim/addrdec.cc b/src/gpgpu-sim/addrdec.cc
index ca88ec9..09bbc3c 100644
--- a/src/gpgpu-sim/addrdec.cc
+++ b/src/gpgpu-sim/addrdec.cc
@@ -182,7 +182,7 @@ void linear_to_raw_address_translation::addrdec_tlx(new_addr_type addr, addrdec_
 			  }
 
 			  assert(tlx->chip < m_n_channel);
-			  assert(tlx->sub_partition < m_n_channel*m_n_sub_partition_in_channel);
+			  assert(tlx->sub_partition < m_n_channel * m_n_sub_partition_in_channel);
 			  return;
 			break;
 		}
diff --git a/src/gpgpu-sim/addrdec.h b/src/gpgpu-sim/addrdec.h
index a5333fb..c9a1420 100644
--- a/src/gpgpu-sim/addrdec.h
+++ b/src/gpgpu-sim/addrdec.h
@@ -92,7 +92,7 @@ private:
    new_addr_type sub_partition_id_mask; 
 
    unsigned int gap;
-   int m_n_channel;
+   unsigned m_n_channel;
    int m_n_sub_partition_in_channel; 
 
 };
diff --git a/src/gpgpu-sim/dram.cc b/src/gpgpu-sim/dram.cc
index d443d79..9c33822 100644
--- a/src/gpgpu-sim/dram.cc
+++ b/src/gpgpu-sim/dram.cc
@@ -482,7 +482,6 @@ void dram_t::cycle()
 
         bool memory_pending_rw_found=false;
         for (unsigned j=0;j<m_config->nbk;j++) {
-     	   unsigned grp = get_bankgrp_number(j);
      	   if (bk[j]->mrq && (((bk[j]->curr_row == bk[j]->mrq->row) &&
      		  (bk[j]->mrq->rw == READ)  &&
      		  (bk[j]->state == BANK_ACTIVE))
@@ -817,10 +816,10 @@ void dram_t::visualize() const
 
 void dram_t::print_stat( FILE* simFile ) 
 {
-   fprintf(simFile,"DRAM (%llu): n_cmd=%llu n_nop=%llu n_act=%llu n_pre=%llu n_ref=%llu n_req=%llu n_rd=%llu n_write=%llu bw_util=%.4g ",
+   fprintf(simFile,"DRAM (%u): n_cmd=%llu n_nop=%llu n_act=%llu n_pre=%llu n_ref=%llu n_req=%llu n_rd=%llu n_write=%llu bw_util=%.4g ",
            id, n_cmd, n_nop, n_act, n_pre, n_ref, n_req, n_rd, n_wr,
            (float)bwutil/n_cmd);
-   fprintf(simFile, "mrqq: %d %.4g mrqsmax=%d ", max_mrqs, (float)ave_mrqs/n_cmd, max_mrqs_temp);
+   fprintf(simFile, "mrqq: %d %.4g mrqsmax=%llu ", max_mrqs, (float)ave_mrqs/n_cmd, max_mrqs_temp);
    fprintf(simFile, "\n");
    fprintf(simFile, "dram_util_bins:");
    for (unsigned i=0;i<10;i++) fprintf(simFile, " %d", dram_util_bins[i]);
@@ -899,10 +898,10 @@ void dram_t::set_dram_power_stats(	unsigned &cmd,
 unsigned dram_t::get_bankgrp_number(unsigned i)
 {
 	if(m_config->dram_bnkgrp_indexing_policy == HIGHER_BITS) { //higher bits
-		return i>>m_config->bk_tag_length;
+		return i >> m_config->bk_tag_length;
 	}
 	else if (m_config->dram_bnkgrp_indexing_policy == LOWER_BITS) { //lower bits
-		return i&((m_config->nbkgrp-1));
+		return i & ((m_config->nbkgrp - 1));
 	}
 	else {
 		assert(1);
diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc
index 1705821..dec61db 100644
--- a/src/gpgpu-sim/gpu-cache.cc
+++ b/src/gpgpu-sim/gpu-cache.cc
@@ -777,7 +777,7 @@ void cache_stats::print_stats(FILE *fout, const char *cache_name) const{
     }
     for (unsigned type = 0; type < NUM_MEM_ACCESS_TYPE; ++type) {
     	 if(total_access[type] > 0)
-    	  fprintf(fout, "\t%s[%s][%s] = %llu\n",
+    	  fprintf(fout, "\t%s[%s][%s] = %u\n",
 				m_cache_name.c_str(),
 				mem_access_type_str((enum mem_access_type)type),
 				"TOTAL_ACCESS",
@@ -790,7 +790,7 @@ void cache_stats::print_fail_stats(FILE *fout, const char *cache_name) const{
 	    for (unsigned type = 0; type < NUM_MEM_ACCESS_TYPE; ++type) {
 	        for (unsigned fail = 0; fail < NUM_CACHE_RESERVATION_FAIL_STATUS; ++fail) {
 	            if(m_fail_stats[type][fail] > 0){
-	                fprintf(fout, "\t%s[%s][%s] = %u\n",
+	                fprintf(fout, "\t%s[%s][%s] = %llu\n",
 	                    m_cache_name.c_str(),
 	                    mem_access_type_str((enum mem_access_type)type),
 						cache_fail_status_str((enum cache_reservation_fail_reason)fail),
@@ -1417,8 +1417,6 @@ data_cache::wr_miss_wa_lazy_fetch_on_read( new_addr_type addr,
 {
 
 	    new_addr_type block_addr = m_config.block_addr(addr);
-	    new_addr_type mshr_addr = m_config.mshr_addr(mf->get_addr());
-
 
 		//if the request writes to the whole cache line/sector, then, write and set cache line Modified.
 		//and no need to send read request to memory or reserve mshr
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index e4ae04f..1f9a422 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -1101,8 +1101,8 @@ void gpgpu_sim::gpu_print_stat()
    printf("gpu_tot_sim_insn = %lld\n", gpu_tot_sim_insn+gpu_sim_insn);
    printf("gpu_tot_ipc = %12.4f\n", (float)(gpu_tot_sim_insn+gpu_sim_insn) / (gpu_tot_sim_cycle+gpu_sim_cycle));
    printf("gpu_tot_issued_cta = %lld\n", gpu_tot_issued_cta + m_total_cta_launched);
-   printf("gpu_occupancy = %.4f\% \n", gpu_occupancy.get_occ_fraction() * 100);
-   printf("gpu_tot_occupancy = %.4f\% \n", (gpu_occupancy + gpu_tot_occupancy).get_occ_fraction() * 100);
+   printf("gpu_occupancy = %.4f%% \n", gpu_occupancy.get_occ_fraction() * 100);
+   printf("gpu_tot_occupancy = %.4f%% \n", (gpu_occupancy + gpu_tot_occupancy).get_occ_fraction() * 100);
 
 
    fprintf(statfout, "max_total_param_size = %llu\n", gpgpu_ctx->device_runtime->g_max_total_param_size);
@@ -1343,7 +1343,7 @@ bool shader_core_ctx::occupy_shader_resource_1block(kernel_info_t & k, bool occu
        m_occupied_regs += (padded_cta_size * ((kernel_info->regs+3)&~3));
        m_occupied_ctas++;
 
-      SHADER_DPRINTF(LIVENESS, "GPGPU-Sim uArch: Occupied %d threads, %d shared mem, %d registers, %d ctas\n",
+      SHADER_DPRINTF(LIVENESS, "GPGPU-Sim uArch: Occupied %u threads, %u shared mem, %u registers, %u ctas\n",
             m_occupied_n_threads, m_occupied_shmem, m_occupied_regs, m_occupied_ctas);  
    }
 
@@ -1460,7 +1460,7 @@ void shader_core_ctx::issue_block2core( kernel_info_t &kernel )
         nthreads_in_block += ptx_sim_init_thread(kernel,&m_thread[i],m_sid,i,cta_size-(i-start_thread),m_config->n_thread_per_shader,this,free_cta_hw_id,warp_id,m_cluster->get_gpu());
         m_threadState[i].m_active = true; 
         // load thread local memory and register file
-        if(m_gpu->resume_option==1 && kernel.get_uid()==m_gpu->resume_kernel && ctaid>=m_gpu->resume_CTA && ctaid<m_gpu->checkpoint_CTA_t )
+        if(m_gpu->resume_option == 1 && kernel.get_uid() == m_gpu->resume_kernel && ctaid >= m_gpu->resume_CTA && ctaid < m_gpu->checkpoint_CTA_t )
         {
             char fname[2048];
             snprintf(fname,2048,"checkpoint_files/thread_%d_%d_reg.txt",i%cta_size,ctaid );
@@ -1475,7 +1475,7 @@ void shader_core_ctx::issue_block2core( kernel_info_t &kernel )
     assert( nthreads_in_block > 0 && nthreads_in_block <= m_config->n_thread_per_shader); // should be at least one, but less than max
     m_cta_status[free_cta_hw_id]=nthreads_in_block;
 
-    if(m_gpu->resume_option==1 && kernel.get_uid()==m_gpu->resume_kernel && ctaid>=m_gpu->resume_CTA && ctaid<m_gpu->checkpoint_CTA_t )
+    if(m_gpu->resume_option == 1 && kernel.get_uid() == m_gpu->resume_kernel && ctaid >= m_gpu->resume_CTA && ctaid < m_gpu->checkpoint_CTA_t )
     {
         char f1name[2048];
         snprintf(f1name,2048,"checkpoint_files/shared_mem_%d.txt", ctaid);
diff --git a/src/gpgpu-sim/l2cache.cc b/src/gpgpu-sim/l2cache.cc
index 6540b52..862461f 100644
--- a/src/gpgpu-sim/l2cache.cc
+++ b/src/gpgpu-sim/l2cache.cc
@@ -82,7 +82,7 @@ void memory_partition_unit::handle_memcpy_to_gpu( size_t addr, unsigned global_s
     unsigned p = global_sub_partition_id_to_local_id(global_subpart_id);
     std::string mystring =
         mask.to_string<char,std::string::traits_type,std::string::allocator_type>();
-    MEMPART_DPRINTF("Copy Engine Request Received For Address=%llx, local_subpart=%u, global_subpart=%u, sector_mask=%s \n", addr, p, global_subpart_id, mystring.c_str()); 
+    MEMPART_DPRINTF("Copy Engine Request Received For Address=%zx, local_subpart=%u, global_subpart=%u, sector_mask=%s \n", addr, p, global_subpart_id, mystring.c_str()); 
     m_sub_partition[p]->force_l2_tag_update(addr,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle, mask);
 }
 
@@ -622,7 +622,7 @@ std::vector<mem_fetch*> memory_sub_partition::breakdown_request_to_sector_reques
 			}
 		} else
 			{
-			    printf("Invalid sector received, address = 0x%06x, sector mask = %s, data size = %d",
+			    printf("Invalid sector received, address = 0x%06llx, sector mask = %s, data size = %d",
 			    		mf->get_addr(), mf->get_access_sector_mask(), mf->get_data_size());
 				assert(0 && "Undefined sector mask is received");
 			}
@@ -657,7 +657,7 @@ std::vector<mem_fetch*> memory_sub_partition::breakdown_request_to_sector_reques
 			 byte_sector_mask <<= SECTOR_SIZE;
 		}
 	} else {
-		 printf("Invalid sector received, address = 0x%06x, sector mask = %d, byte mask = , data size = %d",
+		 printf("Invalid sector received, address = 0x%06llx, sector mask = %d, byte mask = , data size = %u",
 					    		mf->get_addr(), mf->get_access_sector_mask().count(), mf->get_data_size());
 		 assert(0 && "Undefined data size is received");
 	}
diff --git a/src/gpgpu-sim/local_interconnect.cc b/src/gpgpu-sim/local_interconnect.cc
index 1416b2c..bb09d44 100644
--- a/src/gpgpu-sim/local_interconnect.cc
+++ b/src/gpgpu-sim/local_interconnect.cc
@@ -231,7 +231,7 @@ LocalInterconnect::LocalInterconnect(const struct inct_config& m_localinct_confi
 }
 
 LocalInterconnect::~LocalInterconnect(){
-	for (int i=0; i<m_inct_config.subnets; ++i) {
+	for (unsigned i = 0; i < m_inct_config.subnets; ++i) {
 		delete net[i];
 	}
 }
diff --git a/src/gpgpu-sim/scoreboard.cc b/src/gpgpu-sim/scoreboard.cc
index 80f95c6..1017e75 100644
--- a/src/gpgpu-sim/scoreboard.cc
+++ b/src/gpgpu-sim/scoreboard.cc
@@ -140,10 +140,10 @@ bool Scoreboard::checkCollision( unsigned wid, const class inst_t *inst ) const
 	// Get list of all input and output registers
 	std::set<int> inst_regs;
 
-	for(int iii=0;iii<inst->outcount;iii++)
+	for(unsigned iii=0; iii < inst->outcount; iii++)
 		inst_regs.insert(inst->out[iii]);
 
-	for(int jjj=0;jjj<inst->incount;jjj++)
+	for(unsigned jjj=0;jjj<inst->incount;jjj++)
 		inst_regs.insert(inst->in[jjj]);
 
         if(inst->pred > 0) inst_regs.insert(inst->pred);
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index c697450..c365ebb 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -87,7 +87,7 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu,
                                   shader_core_stats *stats )
    : core_t( gpu, NULL, config->warp_size, config->n_thread_per_shader ),
      m_barriers( this, config->max_warps_per_shader, config->max_cta_per_core, config->max_barriers_per_cta, config->warp_size ),
-     m_dynamic_warp_id(0), m_active_warps(0)
+     m_active_warps(0), m_dynamic_warp_id(0)
 {
     m_cluster = cluster;
     m_config = config;
@@ -164,7 +164,7 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu,
                                          NUM_CONCRETE_SCHEDULERS;
     assert ( scheduler != NUM_CONCRETE_SCHEDULERS );
     
-    for (int i = 0; i < m_config->gpgpu_num_sched_per_core; i++) {
+    for (unsigned i = 0; i < m_config->gpgpu_num_sched_per_core; i++) {
         switch( scheduler )
         {
             case CONCRETE_SCHEDULER_LRR:
@@ -263,7 +263,7 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu,
         //distribute i's evenly though schedulers;
         schedulers[i%m_config->gpgpu_num_sched_per_core]->add_supervised_warp_id(i);
     }
-    for ( int i = 0; i < m_config->gpgpu_num_sched_per_core; ++i ) {
+    for ( unsigned i = 0; i < m_config->gpgpu_num_sched_per_core; ++i ) {
         schedulers[i]->done_adding_supervised_warps();
     }
     
@@ -474,7 +474,7 @@ void shader_core_ctx::init_warps( unsigned cta_id, unsigned start_thread, unsign
             }
             m_simt_stack[i]->launch(start_pc,active_threads);
 
-              if(m_gpu->resume_option==1 && kernel_id==m_gpu->resume_kernel && ctaid>=m_gpu->resume_CTA && ctaid<m_gpu->checkpoint_CTA_t )
+              if(m_gpu->resume_option == 1 && kernel_id == m_gpu->resume_kernel && ctaid >= m_gpu->resume_CTA && ctaid < m_gpu->checkpoint_CTA_t )
                { 
                 char fname[2048];
                 snprintf(fname,2048,"checkpoint_files/warp_%d_%d_simt.txt",i%warp_per_cta,ctaid );
@@ -868,7 +868,7 @@ void shader_core_ctx::func_exec_inst( warp_inst_t &inst )
 
 void shader_core_ctx::issue_warp( register_set& pipe_reg_set, const warp_inst_t* next_inst, const active_mask_t &active_mask, unsigned warp_id, unsigned sch_id )
 {
-	warp_inst_t** pipe_reg = pipe_reg = pipe_reg_set.get_free(m_config->sub_core_model, sch_id);
+	warp_inst_t** pipe_reg = pipe_reg_set.get_free(m_config->sub_core_model, sch_id);
     assert(pipe_reg);
 
     m_warp[warp_id].ibuffer_free();
@@ -2134,7 +2134,7 @@ ldst_unit::ldst_unit( mem_fetch_interface *icnt,
 
         if(m_config->m_L1D_config.l1_latency > 0)
 	    {
-        	for(int i=0; i<m_config->m_L1D_config.l1_latency; i++ )
+        	for(unsigned i = 0; i < m_config->m_L1D_config.l1_latency; i++ )
         		l1_latency_queue.push_back((mem_fetch*)NULL);
 	    }
     }
@@ -2446,7 +2446,7 @@ void shader_core_ctx::register_cta_thread_exit( unsigned cta_num, kernel_info_t
       m_barriers.deallocate_barrier(cta_num);
       shader_CTA_count_unlog(m_sid, 1);
 
-     SHADER_DPRINTF(LIVENESS, "GPGPU-Sim uArch: Finished CTA #%d (%lld,%lld), %u CTAs running\n",
+     SHADER_DPRINTF(LIVENESS, "GPGPU-Sim uArch: Finished CTA #%u (%lld,%lld), %u CTAs running\n",
         cta_num, m_gpu->gpu_sim_cycle, m_gpu->gpu_tot_sim_cycle, m_n_active_cta);
 
       if( m_n_active_cta == 0 ) {
diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h
index b0d7f7f..dbe2285 100644
--- a/src/gpgpu-sim/shader.h
+++ b/src/gpgpu-sim/shader.h
@@ -1392,9 +1392,9 @@ class shader_core_config : public core_config
 	 	If we won't remove it, old regression will be broken.
 		So to support the legacy config files it's best to handle in this way.
          */  
-	int num_config_to_read=N_PIPELINE_STAGES-2*(!gpgpu_tensor_core_avail);
+	int num_config_to_read= N_PIPELINE_STAGES - 2 * (!gpgpu_tensor_core_avail);
 
-        for (unsigned i = 0; i <num_config_to_read; i++) { 
+        for (int i = 0; i < num_config_to_read; i++) { 
 	    assert(toks);
 	    ntok = sscanf(toks,"%d", &pipe_widths[i]);
 	    assert(ntok == 1); 
@@ -1455,7 +1455,7 @@ class shader_core_config : public core_config
 
     bool gpgpu_dwf_reg_bankconflict;
 
-    int gpgpu_num_sched_per_core;
+    unsigned gpgpu_num_sched_per_core;
     int gpgpu_max_insn_issue_per_warp;
     bool gpgpu_dual_issue_diff_exec_units;