adding perfect inst and const support

4 files changed, 28 insertions, 3 deletions

diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index a9462f5..7f9985e 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -467,6 +467,9 @@ void shader_core_config::reg_options(class OptionParser * opp)
     option_parser_register(opp, "-gpgpu_concurrent_kernel_sm", OPT_BOOL, &gpgpu_concurrent_kernel_sm, 
                 "Support concurrent kernels on a SM (default = disabled)", 
                 "0");
+    option_parser_register(opp, "-perfect_inst_const_cache", OPT_BOOL, &perfect_inst_const_cache,
+                "perfect inst and const cache mode, so all inst and const hits in the cache(default = disabled)",
+                "0");
 
 }
 
diff --git a/src/gpgpu-sim/mem_fetch.cc b/src/gpgpu-sim/mem_fetch.cc
index 6a00889..c6ef1ec 100644
--- a/src/gpgpu-sim/mem_fetch.cc
+++ b/src/gpgpu-sim/mem_fetch.cc
@@ -67,6 +67,10 @@ mem_fetch::mem_fetch( const mem_access_t &access,
    icnt_flit_size = config->icnt_flit_size;
    original_mf = m_original_mf;
    original_wr_mf = m_original_wr_mf;
+   if(m_original_mf){
+	   m_raw_addr.chip=m_original_mf->get_tlx_addr().chip;
+	   m_raw_addr.sub_partition=m_original_mf->get_tlx_addr().sub_partition;
+   }
 }
 
 mem_fetch::~mem_fetch()
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index e5a1e7d..acf40e5 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -869,7 +869,12 @@ void shader_core_ctx::fetch()
 							m_gpu->gpu_tot_sim_cycle+m_gpu->gpu_sim_cycle
 							);
                     std::list<cache_event> events;
-                    enum cache_request_status status = m_L1I->access( (new_addr_type)ppc, mf, m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle,events);
+                    enum cache_request_status status;
+                    if(m_config->perfect_inst_const_cache)
+                    	status = HIT;
+                    else
+                    	status = m_L1I->access( (new_addr_type)ppc, mf, m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle,events);
+
                     if( status == MISS ) {
                         m_last_warp_fetched=warp_id;
                         m_warp[warp_id].set_imiss_pending();
@@ -1826,7 +1831,20 @@ bool ldst_unit::constant_cycle( warp_inst_t &inst, mem_stage_stall_type &rc_fail
        return true;
    if( inst.active_count() == 0 ) 
        return true;
-   mem_stage_stall_type fail = process_memory_access_queue(m_L1C,inst);
+
+   mem_stage_stall_type fail;
+   if(m_config->perfect_inst_const_cache) {
+	   fail = NO_RC_FAIL;
+	   while(inst.accessq_count() > 0) inst.accessq_pop_back();
+	   if ( inst.is_load() ) {
+		   for ( unsigned r=0; r < MAX_OUTPUT_VALUES; r++)
+			   if (inst.out[r] > 0)
+				   m_pending_writes[inst.warp_id()][inst.out[r]]--;
+	   }
+   } else {
+    fail = process_memory_access_queue(m_L1C,inst);
+   }
+
    if (fail != NO_RC_FAIL){ 
       rc_fail = fail; //keep other fails if this didn't fail.
       fail_type = C_MEM;
diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h
index ae88b7d..d41c220 100644
--- a/src/gpgpu-sim/shader.h
+++ b/src/gpgpu-sim/shader.h
@@ -1523,7 +1523,7 @@ class shader_core_config : public core_config
     //Jin: concurrent kernel on sm
     bool gpgpu_concurrent_kernel_sm;
 
-    bool adpative_volta_cache_config;
+    bool perfect_inst_const_cache;
 
 };