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authorJRPAN <[email protected]>2021-05-19 15:22:31 -0400
committerJRPAN <[email protected]>2021-05-19 15:24:50 -0400
commit4a762a933a054b5124fa46a12789ea98f5e2411d (patch)
tree27d3b863234aa6498edbf14c2c8c4a96bbd3335c /src/gpgpu-sim
parenta2b1b1c2839fe3fc05a0cae126204120fab00f62 (diff)
formatting again
Diffstat (limited to 'src/gpgpu-sim')
-rw-r--r--src/gpgpu-sim/gpu-sim.cc2
-rw-r--r--src/gpgpu-sim/shader.cc1
2 files changed, 2 insertions, 1 deletions
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index bd09cdb..a2aa929 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -249,7 +249,7 @@ void shader_core_config::reg_options(class OptionParser *opp) {
" {<nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_"
"alloc>,<mshr>:<N>:<merge>,<mq> | none}",
"none");
- option_parser_register(opp,"-gpgpu_cache_write_ratio",OPT_UINT32,&m_L1D_config.m_wr_percent,"L1D write ratio","0");
+ option_parser_register(opp,"-gpgpu_l1_cache_write_ratio",OPT_UINT32,&m_L1D_config.m_wr_percent,"L1D write ratio","0");
option_parser_register(opp, "-gpgpu_l1_banks", OPT_UINT32,
&m_L1D_config.l1_banks, "The number of L1 cache banks",
"1");
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index b2adb4f..141c700 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -3326,6 +3326,7 @@ unsigned int shader_core_config::max_cta(const kernel_info_t &k) const {
// For more info about adaptive cache, see
bool l1d_configured = false;
unsigned l1_defined = m_L1D_config.get_original_sz() / 1024;
+ assert(gpgpu_unified_l1d_size % l1_defined == 0);
unsigned max_assoc = m_L1D_config.get_original_assoc() *
gpgpu_unified_l1d_size / l1_defined;