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authorMahmoud <[email protected]>2017-10-12 17:57:23 -0400
committerMahmoud <[email protected]>2017-10-12 17:57:23 -0400
commit6e60441e5724f3d9dd974c17ca67e7bf3e1f990b (patch)
treed19e2f96c58a047df7e8941938da0a3cb33ab77b /src/gpgpu-sim
parent5661fa57d14356528a380134b3552876fcd72566 (diff)
remove Tex cache assertion and prevent spunit to execute DP insts
Diffstat (limited to 'src/gpgpu-sim')
-rw-r--r--src/gpgpu-sim/gpu-cache.cc2
-rw-r--r--src/gpgpu-sim/shader.h1
2 files changed, 2 insertions, 1 deletions
diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc
index 9633874..eadc094 100644
--- a/src/gpgpu-sim/gpu-cache.cc
+++ b/src/gpgpu-sim/gpu-cache.cc
@@ -1483,7 +1483,7 @@ void tex_cache::cycle(){
unsigned rob_index = m_rob.next_pop_index();
const rob_entry &r = m_rob.peek(rob_index);
assert( r.m_request == e.m_request );
- assert( r.m_block_addr == m_config.block_addr(e.m_request->get_addr()) );
+ //assert( r.m_block_addr == m_config.block_addr(e.m_request->get_addr()) );
if ( r.m_ready ) {
assert( r.m_index == e.m_cache_index );
m_cache[r.m_index].m_valid = true;
diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h
index c93e0ee..5b41c06 100644
--- a/src/gpgpu-sim/shader.h
+++ b/src/gpgpu-sim/shader.h
@@ -1123,6 +1123,7 @@ public:
case LOAD_OP: return false;
case STORE_OP: return false;
case MEMORY_BARRIER_OP: return false;
+ case DP_OP: return false;
default: break;
}
return pipelined_simd_unit::can_issue(inst);