Fix for Bug 118: Cache line size restrictions

Added an assertion that checks to make sure that incoming mem_fetch size is less than or equal to cache's line size. This requires non-decreasing line sizes going down the cache heirarchy.
Changed Quadro's texture L2 cache to have 256B lines (because of above restriction and instruction cache having 256B lines; Henry's paper also observed 256B line size for L2). Increased total L2 size to 256KB from 128KB as per Henry's paper. From ISPASS, SDK, and RODINIA benchmarks, only MUM and MGST are affected with a 30% slowdown.

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11253]

1 files changed, 6 insertions, 0 deletions

diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h
index 2e5466c..7e143f9 100644
--- a/src/gpgpu-sim/gpu-cache.h
+++ b/src/gpgpu-sim/gpu-cache.h
@@ -400,6 +400,8 @@ public:
     // access cache: returns RESERVATION_FAIL if request could not be accepted (for any reason)
     virtual enum cache_request_status access( new_addr_type addr, mem_fetch *mf, unsigned time, std::list<cache_event> &events ) 
     {
+        assert( mf->get_data_size() <= m_config.get_line_sz());
+
         assert(m_config.m_write_policy == READ_ONLY);
         assert(!mf->get_is_write());
         new_addr_type block_addr = m_config.block_addr(addr);
@@ -539,6 +541,8 @@ public:
     }
     virtual enum cache_request_status access( new_addr_type addr, mem_fetch *mf, unsigned time, std::list<cache_event> &events ) 
     {
+        assert( mf->get_data_size() <= m_config.get_line_sz());
+
         bool wr = mf->get_is_write();
         enum mem_access_type type = mf->get_access_type();
         bool evict = (type == GLOBAL_ACC_W); // evict a line that hits on global memory write
@@ -657,6 +661,8 @@ public:
         if ( m_fragment_fifo.full() || m_request_fifo.full() || m_rob.full() )
             return RESERVATION_FAIL;
 
+        assert( mf->get_data_size() <= m_config.get_line_sz());
+
         // at this point, we will accept the request : access tags and immediately allocate line
         new_addr_type block_addr = m_config.block_addr(addr);
         unsigned cache_index = (unsigned)-1;