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authortgrogers <[email protected]>2019-07-12 10:30:08 -0400
committertgrogers <[email protected]>2019-07-12 10:30:08 -0400
commit89e913f7b28e342b9023a01105cb441cfafbee8b (patch)
tree39224ede8f55cac67884b92100e3d50451e635ba /src/gpgpu-sim
parent3429bfacff71a0da92ffb05e964c90dbf26ccac0 (diff)
parentaa12db699a540ea7b4ed4b913be6ef3155fc68d6 (diff)
Merge branch 'dev' of github.com:purdue-aalp/gpgpu-sim_distribution into dev
Diffstat (limited to 'src/gpgpu-sim')
-rw-r--r--src/gpgpu-sim/gpu-sim.cc20
-rw-r--r--src/gpgpu-sim/gpu-sim.h17
-rw-r--r--src/gpgpu-sim/mem_latency_stat.cc2
-rw-r--r--src/gpgpu-sim/mem_latency_stat.h4
-rw-r--r--src/gpgpu-sim/power_interface.cc2
-rw-r--r--src/gpgpu-sim/power_interface.h2
-rw-r--r--src/gpgpu-sim/power_stat.cc6
-rw-r--r--src/gpgpu-sim/power_stat.h6
-rw-r--r--src/gpgpu-sim/shader.cc26
-rw-r--r--src/gpgpu-sim/shader.h18
10 files changed, 58 insertions, 45 deletions
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 2ff37d1..93f041a 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -499,11 +499,11 @@ void gpgpu_sim_config::reg_options(option_parser_t opp)
option_parser_register(opp, "-gpgpu_deadlock_detect", OPT_BOOL, &gpu_deadlock_detect,
"Stop the simulation at deadlock (1=on (default), 0=off)",
"1");
- option_parser_register(opp, "-gpgpu_ptx_instruction_classification", OPT_INT32,
- &gpgpu_ptx_instruction_classification,
+ option_parser_register(opp, "-gpgpu_ptx_instruction_classification", OPT_INT32,
+ &(gpgpu_ctx->func_sim->gpgpu_ptx_instruction_classification),
"if enabled will classify ptx instruction types per kernel (Max 255 kernels now)",
"0");
- option_parser_register(opp, "-gpgpu_ptx_sim_mode", OPT_INT32, &g_ptx_sim_mode,
+ option_parser_register(opp, "-gpgpu_ptx_sim_mode", OPT_INT32, &(gpgpu_ctx->func_sim->g_ptx_sim_mode),
"Select between Performance (default) or Functional simulation (1)",
"0");
option_parser_register(opp, "-gpgpu_clock_domains", OPT_CSTR, &gpgpu_clock_domains,
@@ -699,7 +699,7 @@ void gpgpu_sim::stop_all_running_kernels(){
}
gpgpu_sim::gpgpu_sim( const gpgpu_sim_config &config, gpgpu_context* ctx )
- : gpgpu_t(config), m_config(config)
+ : gpgpu_t(config, ctx), m_config(config)
{
gpgpu_ctx = ctx;
m_shader_config = &m_config.m_shader_config;
@@ -882,7 +882,7 @@ void gpgpu_sim::init()
gpu_sim_cycle_parition_util = 0;
reinit_clock_domains();
- set_param_gpgpu_num_shaders(m_config.num_shader());
+ gpgpu_ctx->func_sim->set_param_gpgpu_num_shaders(m_config.num_shader());
for (unsigned i=0;i<m_shader_config->n_simt_clusters;i++)
m_cluster[i]->reinit();
m_shader_stats->new_grid();
@@ -1200,9 +1200,9 @@ void gpgpu_sim::gpu_print_stat()
spill_log_to_file (stdout, 1, gpu_sim_cycle);
insn_warp_occ_print(stdout);
}
- if ( gpgpu_ptx_instruction_classification ) {
- StatDisp( g_inst_classification_stat[g_ptx_kernel_count]);
- StatDisp( g_inst_op_classification_stat[g_ptx_kernel_count]);
+ if ( gpgpu_ctx->func_sim->gpgpu_ptx_instruction_classification ) {
+ StatDisp( gpgpu_ctx->func_sim->g_inst_classification_stat[gpgpu_ctx->func_sim->g_ptx_kernel_count]);
+ StatDisp( gpgpu_ctx->func_sim->g_inst_op_classification_stat[gpgpu_ctx->func_sim->g_ptx_kernel_count]);
}
#ifdef GPGPUSIM_POWER_MODEL
@@ -1753,7 +1753,7 @@ void gpgpu_sim::cycle()
#if (CUDART_VERSION >= 5000)
//launch device kernel
- launch_one_device_kernel();
+ gpgpu_ctx->device_runtime->launch_one_device_kernel();
#endif
}
}
@@ -1826,7 +1826,7 @@ void gpgpu_sim::dump_pipeline( int mask, int s, int m ) const
fflush(stdout);
}
-const struct shader_core_config * gpgpu_sim::getShaderCoreConfig()
+const shader_core_config * gpgpu_sim::getShaderCoreConfig()
{
return m_shader_config;
}
diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h
index e2c913a..119b934 100644
--- a/src/gpgpu-sim/gpu-sim.h
+++ b/src/gpgpu-sim/gpu-sim.h
@@ -62,6 +62,8 @@
#define SAMPLELOG 222
#define DUMPLOG 333
+class gpgpu_context;
+
extern tr1_hash_map<new_addr_type,unsigned> address_random_interleaving;
enum dram_ctrl_t {
@@ -295,7 +297,10 @@ extern bool g_interactive_debugger_enabled;
class gpgpu_sim_config : public power_config, public gpgpu_functional_sim_config {
public:
- gpgpu_sim_config() { m_valid = false; }
+ gpgpu_sim_config(gpgpu_context* ctx): m_shader_config(ctx) {
+ m_valid = false;
+ gpgpu_ctx = ctx;
+ }
void reg_options(class OptionParser * opp);
void init()
{
@@ -341,6 +346,8 @@ private:
void init_clock_domains(void );
+ // backward pointer
+ class gpgpu_context* gpgpu_ctx;
bool m_valid;
shader_core_config m_shader_config;
memory_config m_memory_config;
@@ -473,7 +480,7 @@ public:
/*!
* Returning the configuration of the shader core, used by the functional simulation only so far
*/
- const struct shader_core_config * getShaderCoreConfig();
+ const shader_core_config * getShaderCoreConfig();
//! Get shader core Memory Configuration
@@ -489,6 +496,8 @@ public:
*/
simt_core_cluster * getSIMTCluster();
+ // backward pointer
+ class gpgpu_context* gpgpu_ctx;
private:
// clocks
@@ -506,8 +515,6 @@ private:
void gpgpu_debug();
///// data /////
-// backward pointer
- class gpgpu_context* gpgpu_ctx;
class simt_core_cluster **m_cluster;
class memory_partition_unit **m_memory_partition_unit;
@@ -537,7 +544,7 @@ private:
const gpgpu_sim_config &m_config;
const struct cudaDeviceProp *m_cuda_properties;
- const struct shader_core_config *m_shader_config;
+ const shader_core_config *m_shader_config;
const struct memory_config *m_memory_config;
// stats
diff --git a/src/gpgpu-sim/mem_latency_stat.cc b/src/gpgpu-sim/mem_latency_stat.cc
index 04dc75b..d08ba39 100644
--- a/src/gpgpu-sim/mem_latency_stat.cc
+++ b/src/gpgpu-sim/mem_latency_stat.cc
@@ -42,7 +42,7 @@
#include <stdlib.h>
#include <stdio.h>
-memory_stats_t::memory_stats_t( unsigned n_shader, const struct shader_core_config *shader_config, const struct memory_config *mem_config, const class gpgpu_sim* gpu )
+memory_stats_t::memory_stats_t( unsigned n_shader, const shader_core_config *shader_config, const struct memory_config *mem_config, const class gpgpu_sim* gpu )
{
assert( mem_config->m_valid );
assert( shader_config->m_valid );
diff --git a/src/gpgpu-sim/mem_latency_stat.h b/src/gpgpu-sim/mem_latency_stat.h
index b9285c1..6ce568d 100644
--- a/src/gpgpu-sim/mem_latency_stat.h
+++ b/src/gpgpu-sim/mem_latency_stat.h
@@ -35,7 +35,7 @@
class memory_stats_t {
public:
memory_stats_t( unsigned n_shader,
- const struct shader_core_config *shader_config,
+ const class shader_core_config *shader_config,
const struct memory_config *mem_config,
const class gpgpu_sim* gpu);
@@ -53,7 +53,7 @@ public:
unsigned m_n_shader;
- const struct shader_core_config *m_shader_config;
+ const shader_core_config *m_shader_config;
const struct memory_config *m_memory_config;
const class gpgpu_sim* m_gpu;
diff --git a/src/gpgpu-sim/power_interface.cc b/src/gpgpu-sim/power_interface.cc
index 3861b6a..0272aa6 100644
--- a/src/gpgpu-sim/power_interface.cc
+++ b/src/gpgpu-sim/power_interface.cc
@@ -38,7 +38,7 @@ void init_mcpat(const gpgpu_sim_config &config, class gpgpu_sim_wrapper *wrapper
}
-void mcpat_cycle(const gpgpu_sim_config &config, const struct shader_core_config *shdr_config, class gpgpu_sim_wrapper *wrapper, class power_stat_t *power_stats, unsigned stat_sample_freq, unsigned tot_cycle, unsigned cycle, unsigned tot_inst, unsigned inst){
+void mcpat_cycle(const gpgpu_sim_config &config, const shader_core_config *shdr_config, class gpgpu_sim_wrapper *wrapper, class power_stat_t *power_stats, unsigned stat_sample_freq, unsigned tot_cycle, unsigned cycle, unsigned tot_inst, unsigned inst){
static bool mcpat_init=true;
diff --git a/src/gpgpu-sim/power_interface.h b/src/gpgpu-sim/power_interface.h
index afac22b..a388c23 100644
--- a/src/gpgpu-sim/power_interface.h
+++ b/src/gpgpu-sim/power_interface.h
@@ -36,7 +36,7 @@
#include "gpgpu_sim_wrapper.h"
void init_mcpat(const gpgpu_sim_config &config, class gpgpu_sim_wrapper *wrapper, unsigned stat_sample_freq, unsigned tot_inst, unsigned inst);
-void mcpat_cycle(const gpgpu_sim_config &config, const struct shader_core_config *shdr_config, class gpgpu_sim_wrapper *wrapper, class power_stat_t *power_stats,
+void mcpat_cycle(const gpgpu_sim_config &config, const shader_core_config *shdr_config, class gpgpu_sim_wrapper *wrapper, class power_stat_t *power_stats,
unsigned stat_sample_freq, unsigned tot_cycle, unsigned cycle, unsigned tot_inst, unsigned inst);
void mcpat_reset_perf_count(class gpgpu_sim_wrapper *wrapper);
diff --git a/src/gpgpu-sim/power_stat.cc b/src/gpgpu-sim/power_stat.cc
index 4c995e9..007b4c6 100644
--- a/src/gpgpu-sim/power_stat.cc
+++ b/src/gpgpu-sim/power_stat.cc
@@ -42,7 +42,7 @@
-power_mem_stat_t::power_mem_stat_t(const struct memory_config *mem_config, const struct shader_core_config *shdr_config, memory_stats_t *mem_stats, shader_core_stats *shdr_stats){
+power_mem_stat_t::power_mem_stat_t(const struct memory_config *mem_config, const shader_core_config *shdr_config, memory_stats_t *mem_stats, shader_core_stats *shdr_stats){
assert( mem_config->m_valid );
m_mem_stats = mem_stats;
m_config = mem_config;
@@ -125,7 +125,7 @@ void power_mem_stat_t::print (FILE *fout) const {
}
-power_core_stat_t::power_core_stat_t( const struct shader_core_config *shader_config, shader_core_stats *core_stats )
+power_core_stat_t::power_core_stat_t( const shader_core_config *shader_config, shader_core_stats *core_stats )
{
assert( shader_config->m_valid );
m_config = shader_config;
@@ -266,7 +266,7 @@ for(unsigned i=0; i<m_config->num_shader(); ++i){
}
}
-power_stat_t::power_stat_t( const struct shader_core_config *shader_config,float * average_pipeline_duty_cycle,float *active_sms,shader_core_stats * shader_stats, const struct memory_config *mem_config,memory_stats_t * memory_stats)
+power_stat_t::power_stat_t( const shader_core_config *shader_config,float * average_pipeline_duty_cycle,float *active_sms,shader_core_stats * shader_stats, const struct memory_config *mem_config,memory_stats_t * memory_stats)
{
assert( shader_config->m_valid );
assert( mem_config->m_valid );
diff --git a/src/gpgpu-sim/power_stat.h b/src/gpgpu-sim/power_stat.h
index 20af2e5..91fade9 100644
--- a/src/gpgpu-sim/power_stat.h
+++ b/src/gpgpu-sim/power_stat.h
@@ -73,7 +73,7 @@ struct shader_core_power_stats_pod {
class power_core_stat_t : public shader_core_power_stats_pod {
public:
- power_core_stat_t(const struct shader_core_config *shader_config, shader_core_stats *core_stats);
+ power_core_stat_t(const shader_core_config *shader_config, shader_core_stats *core_stats);
void visualizer_print( gzFile visualizer_file );
void print (FILE *fout);
void init();
@@ -113,7 +113,7 @@ struct mem_power_stats_pod{
class power_mem_stat_t : public mem_power_stats_pod{
public:
- power_mem_stat_t(const struct memory_config *mem_config, const struct shader_core_config *shdr_config, memory_stats_t *mem_stats, shader_core_stats *shdr_stats);
+ power_mem_stat_t(const struct memory_config *mem_config, const shader_core_config *shdr_config, memory_stats_t *mem_stats, shader_core_stats *shdr_stats);
void visualizer_print( gzFile visualizer_file );
void print (FILE *fout) const;
void init();
@@ -128,7 +128,7 @@ private:
class power_stat_t {
public:
- power_stat_t( const struct shader_core_config *shader_config,float * average_pipeline_duty_cycle,float * active_sms,shader_core_stats * shader_stats, const struct memory_config *mem_config,memory_stats_t * memory_stats);
+ power_stat_t( const shader_core_config *shader_config,float * average_pipeline_duty_cycle,float * active_sms,shader_core_stats * shader_stats, const struct memory_config *mem_config,memory_stats_t * memory_stats);
void visualizer_print( gzFile visualizer_file );
void print (FILE *fout) const;
void save_stats(){
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index 69b619a..f380560 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -46,6 +46,7 @@
#include <limits.h>
#include "traffic_breakdown.h"
#include "shader_trace.h"
+#include "../../libcuda/gpgpu_context.h"
#define PRIORITIZE_MSHR_OVER_WB 1
#define MAX(a,b) (((a)>(b))?(a):(b))
@@ -69,7 +70,7 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu,
class simt_core_cluster *cluster,
unsigned shader_id,
unsigned tpc_id,
- const struct shader_core_config *config,
+ const shader_core_config *config,
const struct memory_config *mem_config,
shader_core_stats *stats )
: core_t( gpu, NULL, config->warp_size, config->n_thread_per_shader ),
@@ -1024,7 +1025,7 @@ void scheduler_unit::cycle()
m_simt_stack[warp_id]->get_pdom_stack_top_info(&pc,&rpc);
SCHED_DPRINTF( "Warp (warp_id %u, dynamic_warp_id %u) has valid instruction (%s)\n",
(*iter)->get_warp_id(), (*iter)->get_dynamic_warp_id(),
- ptx_get_insn_str( pc).c_str() );
+ m_shader->m_config->gpgpu_ctx->func_sim->ptx_get_insn_str( pc).c_str() );
if( pI ) {
assert(valid);
if( pc != pI->pc ) {
@@ -1083,12 +1084,11 @@ void scheduler_unit::cycle()
if(pI->m_is_cdp && !warp(warp_id).m_cdp_dummy) {
assert(warp(warp_id).m_cdp_latency == 0);
- extern unsigned cdp_latency[5];
if(pI->m_is_cdp == 1)
- warp(warp_id).m_cdp_latency = cdp_latency[pI->m_is_cdp - 1];
+ warp(warp_id).m_cdp_latency = m_shader->m_config->gpgpu_ctx->func_sim->cdp_latency[pI->m_is_cdp - 1];
else //cudaLaunchDeviceV2 and cudaGetParameterBufferV2
- warp(warp_id).m_cdp_latency = cdp_latency[pI->m_is_cdp - 1]
- + cdp_latency[pI->m_is_cdp] * active_mask.count();
+ warp(warp_id).m_cdp_latency = m_shader->m_config->gpgpu_ctx->func_sim->cdp_latency[pI->m_is_cdp - 1]
+ + m_shader->m_config->gpgpu_ctx->func_sim->cdp_latency[pI->m_is_cdp] * active_mask.count();
warp(warp_id).m_cdp_dummy = true;
break;
}
@@ -2689,7 +2689,7 @@ void warp_inst_t::print( FILE *fout ) const
for (unsigned j=0; j<m_config->warp_size; j++)
fprintf(fout, "%c", (active(j)?'1':'0') );
fprintf(fout, "]: ");
- ptx_print_insn( pc, fout );
+ m_config->gpgpu_ctx->func_sim->ptx_print_insn( pc, fout );
fprintf(fout, "\n");
}
void shader_core_ctx::incexecstat(warp_inst_t *&inst)
@@ -3018,18 +3018,18 @@ void shader_core_config::set_pipeline_latency() {
* [3] MAD
* [4] DIV
*/
- sscanf(opcode_latency_int, "%u,%u,%u,%u,%u",
+ sscanf(gpgpu_ctx->func_sim->opcode_latency_int, "%u,%u,%u,%u,%u",
&int_latency[0],&int_latency[1],&int_latency[2],
&int_latency[3],&int_latency[4]);
- sscanf(opcode_latency_fp, "%u,%u,%u,%u,%u",
+ sscanf(gpgpu_ctx->func_sim->opcode_latency_fp, "%u,%u,%u,%u,%u",
&fp_latency[0],&fp_latency[1],&fp_latency[2],
&fp_latency[3],&fp_latency[4]);
- sscanf(opcode_latency_dp, "%u,%u,%u,%u,%u",
+ sscanf(gpgpu_ctx->func_sim->opcode_latency_dp, "%u,%u,%u,%u,%u",
&dp_latency[0],&dp_latency[1],&dp_latency[2],
&dp_latency[3],&dp_latency[4]);
- sscanf(opcode_latency_sfu, "%u",
+ sscanf(gpgpu_ctx->func_sim->opcode_latency_sfu, "%u",
&sfu_latency);
- sscanf(opcode_latency_tensor, "%u",
+ sscanf(gpgpu_ctx->func_sim->opcode_latency_tensor, "%u",
&tensor_latency);
//all div operation are executed on sfu
@@ -3786,7 +3786,7 @@ void opndcoll_rfu_t::collector_unit_t::dispatch()
simt_core_cluster::simt_core_cluster( class gpgpu_sim *gpu,
unsigned cluster_id,
- const struct shader_core_config *config,
+ const shader_core_config *config,
const struct memory_config *mem_config,
shader_core_stats *stats,
class memory_stats_t *mstats )
diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h
index 25b9607..2837f1b 100644
--- a/src/gpgpu-sim/shader.h
+++ b/src/gpgpu-sim/shader.h
@@ -69,6 +69,8 @@
#define WRITE_MASK_SIZE 8
+class gpgpu_context;
+
enum exec_unit_type_t
{
NONE = 0,
@@ -294,7 +296,7 @@ typedef std::bitset<WARP_PER_CTA_MAX> warp_set_t;
int register_bank(int regnum, int wid, unsigned num_banks, unsigned bank_warp_shift, bool sub_core_model, unsigned banks_per_sched, unsigned sched_id );
class shader_core_ctx;
-struct shader_core_config;
+class shader_core_config;
class shader_core_stats;
enum scheduler_prioritization_type
@@ -1032,7 +1034,7 @@ struct ifetch_buffer_t {
unsigned m_warp_id;
};
-struct shader_core_config;
+class shader_core_config;
class simd_function_unit {
public:
@@ -1362,10 +1364,12 @@ const char* const pipeline_stage_name_decode[] = {
"N_PIPELINE_STAGES"
};
-struct shader_core_config : public core_config
+class shader_core_config : public core_config
{
- shader_core_config(){
+ public:
+ shader_core_config(gpgpu_context* ctx):core_config(ctx){
pipeline_widths_string = NULL;
+ gpgpu_ctx = ctx;
}
void init()
@@ -1425,6 +1429,8 @@ struct shader_core_config : public core_config
unsigned cid_to_sid( unsigned cid, unsigned cluster_id ) const { return cluster_id*n_simt_cores_per_cluster + cid; }
void set_pipeline_latency();
+ // backward pointer
+ class gpgpu_context* gpgpu_ctx;
// data
char *gpgpu_shader_core_pipeline_opt;
bool gpgpu_perfect_mem;
@@ -1770,7 +1776,7 @@ public:
class simt_core_cluster *cluster,
unsigned shader_id,
unsigned tpc_id,
- const struct shader_core_config *config,
+ const shader_core_config *config,
const struct memory_config *mem_config,
shader_core_stats *stats );
@@ -2065,7 +2071,7 @@ class simt_core_cluster {
public:
simt_core_cluster( class gpgpu_sim *gpu,
unsigned cluster_id,
- const struct shader_core_config *config,
+ const shader_core_config *config,
const struct memory_config *mem_config,
shader_core_stats *stats,
memory_stats_t *mstats );