increase stat counter size to long long

8 files changed, 113 insertions, 113 deletions

diff --git a/src/gpgpu-sim/addrdec.cc b/src/gpgpu-sim/addrdec.cc
index c4c0f53..ca88ec9 100644
--- a/src/gpgpu-sim/addrdec.cc
+++ b/src/gpgpu-sim/addrdec.cc
@@ -419,7 +419,7 @@ void linear_to_raw_address_translation::init(unsigned int n_channel, unsigned in
    }
 
    if(memory_partition_indexing == RANDOM)
-	   srand (time(NULL));
+     srand (1);
 
 }
 
diff --git a/src/gpgpu-sim/dram.cc b/src/gpgpu-sim/dram.cc
index 6c11b43..192cb65 100644
--- a/src/gpgpu-sim/dram.cc
+++ b/src/gpgpu-sim/dram.cc
@@ -723,10 +723,10 @@ void dram_t::print( FILE* simFile) const
            id, m_config->nbk, m_config->busW, m_config->BL, m_config->CL );
    fprintf(simFile,"tRRD=%d tCCD=%d, tRCD=%d tRAS=%d tRP=%d tRC=%d\n",
            m_config->tRRD, m_config->tCCD, m_config->tRCD, m_config->tRAS, m_config->tRP, m_config->tRC );
-   fprintf(simFile,"n_cmd=%d n_nop=%d n_act=%d n_pre=%d n_ref_event=%d n_req=%d n_rd=%d n_rd_L2_A=%d n_write=%d n_wr_bk=%d bw_util=%.4g\n",
+   fprintf(simFile,"n_cmd=%llu n_nop=%llu n_act=%llu n_pre=%llu n_ref_event=%llu n_req=%llu n_rd=%llu n_rd_L2_A=%llu n_write=%llu n_wr_bk=%llu bw_util=%.4g\n",
            n_cmd, n_nop, n_act, n_pre, n_ref, n_req, n_rd, n_rd_L2_A, n_wr, n_wr_WB,
            (float)bwutil/n_cmd);
-   fprintf(simFile,"n_activity=%d dram_eff=%.4g\n",
+   fprintf(simFile,"n_activity=%llu dram_eff=%.4g\n",
            n_activity, (float)bwutil/n_activity);
    for (i=0;i<m_config->nbk;i++) {
       fprintf(simFile, "bk%d: %da %di ",i,bk[i]->n_access,bk[i]->n_idle);
@@ -745,39 +745,39 @@ void dram_t::print( FILE* simFile) const
 
    printf("\nBW Util details:\n");
    printf("bwutil = %.6f \n", (float)bwutil/n_cmd);
-   printf("total_CMD = %d \n", n_cmd);
-   printf("util_bw = %d \n", util_bw);
-   printf("Wasted_Col = %d \n", wasted_bw_col);
-   printf("Wasted_Row = %d \n", wasted_bw_row);
-   printf("Idle = %d \n", idle_bw);
+   printf("total_CMD = %llu \n", n_cmd);
+   printf("util_bw = %llu \n", util_bw);
+   printf("Wasted_Col = %llu \n", wasted_bw_col);
+   printf("Wasted_Row = %llu \n", wasted_bw_row);
+   printf("Idle = %llu \n", idle_bw);
 
    printf("\nBW Util Bottlenecks: \n");
-   printf("RCDc_limit = %d \n", RCDc_limit);
-   printf("RCDWRc_limit = %d \n", RCDWRc_limit);
-   printf("WTRc_limit = %d \n", WTRc_limit);
-   printf("RTWc_limit = %d \n", RTWc_limit);
-   printf("CCDLc_limit = %d \n", CCDLc_limit);
-   printf("rwq = %d \n", rwq_limit);
-   printf("CCDLc_limit_alone = %d \n", CCDLc_limit_alone);
-   printf("WTRc_limit_alone = %d \n", WTRc_limit_alone);
-   printf("RTWc_limit_alone = %d \n", RTWc_limit_alone);
+   printf("RCDc_limit = %llu \n", RCDc_limit);
+   printf("RCDWRc_limit = %llu \n", RCDWRc_limit);
+   printf("WTRc_limit = %llu \n", WTRc_limit);
+   printf("RTWc_limit = %llu \n", RTWc_limit);
+   printf("CCDLc_limit = %llu \n", CCDLc_limit);
+   printf("rwq = %llu \n", rwq_limit);
+   printf("CCDLc_limit_alone = %llu \n", CCDLc_limit_alone);
+   printf("WTRc_limit_alone = %llu \n", WTRc_limit_alone);
+   printf("RTWc_limit_alone = %llu \n", RTWc_limit_alone);
 
    printf("\nCommands details: \n");
-   printf("total_CMD = %d \n", n_cmd);
-   printf("n_nop = %d \n", n_nop);
-   printf("Read = %d \n", n_rd);
-   printf("Write = %d \n",n_wr);
-   printf("L2_Alloc = %d \n", n_rd_L2_A);
-   printf("L2_WB = %d \n", n_wr_WB);
-   printf("n_act = %d \n", n_act);
-   printf("n_pre = %d \n", n_pre);
-   printf("n_ref = %d \n", n_ref);
-   printf("n_req = %d \n", n_req );
-   printf("total_req = %d \n", n_rd+n_wr+n_rd_L2_A+n_wr_WB);
+   printf("total_CMD = %llu \n", n_cmd);
+   printf("n_nop = %llu \n", n_nop);
+   printf("Read = %llu \n", n_rd);
+   printf("Write = %llu \n",n_wr);
+   printf("L2_Alloc = %llu \n", n_rd_L2_A);
+   printf("L2_WB = %llu \n", n_wr_WB);
+   printf("n_act = %llu \n", n_act);
+   printf("n_pre = %llu \n", n_pre);
+   printf("n_ref = %llu \n", n_ref);
+   printf("n_req = %llu \n", n_req );
+   printf("total_req = %llu \n", n_rd+n_wr+n_rd_L2_A+n_wr_WB);
 
    printf("\nDual Bus Interface Util: \n");
-   printf("issued_total_row = %lu \n", issued_total_row);
-   printf("issued_total_col = %lu \n", issued_total_col);
+   printf("issued_total_row = %llu \n", issued_total_row);
+   printf("issued_total_col = %llu \n", issued_total_col);
    printf("Row_Bus_Util =  %.6f \n", (float)issued_total_row / n_cmd);
    printf("CoL_Bus_Util = %.6f \n", (float)issued_total_col / n_cmd);
    printf("Either_Row_CoL_Bus_Util = %.6f \n",  (float)issued_total / n_cmd);
@@ -815,7 +815,7 @@ void dram_t::visualize() const
 
 void dram_t::print_stat( FILE* simFile ) 
 {
-   fprintf(simFile,"DRAM (%d): n_cmd=%d n_nop=%d n_act=%d n_pre=%d n_ref=%d n_req=%d n_rd=%d n_write=%d bw_util=%.4g ",
+   fprintf(simFile,"DRAM (%llu): n_cmd=%llu n_nop=%llu n_act=%llu n_pre=%llu n_ref=%llu n_req=%llu n_rd=%llu n_write=%llu bw_util=%.4g ",
            id, n_cmd, n_nop, n_act, n_pre, n_ref, n_req, n_rd, n_wr,
            (float)bwutil/n_cmd);
    fprintf(simFile, "mrqq: %d %.4g mrqsmax=%d ", max_mrqs, (float)ave_mrqs/n_cmd, max_mrqs_temp);
diff --git a/src/gpgpu-sim/dram.h b/src/gpgpu-sim/dram.h
index bee5b7b..1ab0153 100644
--- a/src/gpgpu-sim/dram.h
+++ b/src/gpgpu-sim/dram.h
@@ -178,39 +178,39 @@ private:
    unsigned int dram_eff_bins[10];
    unsigned int last_n_cmd, last_n_activity, last_bwutil;
 
-   unsigned int n_cmd;
-   unsigned int n_activity;
-   unsigned int n_nop;
-   unsigned int n_act;
-   unsigned int n_pre;
-   unsigned int n_ref;
-   unsigned int n_rd;
-   unsigned int n_rd_L2_A;
-   unsigned int n_wr;
-   unsigned int n_wr_WB;
-   unsigned int n_req;
-   unsigned int max_mrqs_temp;
+   unsigned long long n_cmd;
+   unsigned long long n_activity;
+   unsigned long long n_nop;
+   unsigned long long n_act;
+   unsigned long long n_pre;
+   unsigned long long n_ref;
+   unsigned long long n_rd;
+   unsigned long long n_rd_L2_A;
+   unsigned long long n_wr;
+   unsigned long long n_wr_WB;
+   unsigned long long n_req;
+   unsigned long long max_mrqs_temp;
 
-   //some statistics to collect to see where BW is wasted?
-   unsigned wasted_bw_row;
-   unsigned wasted_bw_col;
-   unsigned util_bw;
-   unsigned idle_bw;
-   unsigned RCDc_limit;
-   unsigned CCDLc_limit;
-   unsigned CCDLc_limit_alone;
-   unsigned CCDc_limit;
-   unsigned WTRc_limit;
-   unsigned WTRc_limit_alone;
-   unsigned RCDWRc_limit;
-   unsigned RTWc_limit;
-   unsigned RTWc_limit_alone;
-   unsigned rwq_limit;
+   //some statistics to see where BW is wasted?
+   unsigned long long wasted_bw_row;
+   unsigned long long wasted_bw_col;
+   unsigned long long util_bw;
+   unsigned long long idle_bw;
+   unsigned long long RCDc_limit;
+   unsigned long long CCDLc_limit;
+   unsigned long long CCDLc_limit_alone;
+   unsigned long long CCDc_limit;
+   unsigned long long WTRc_limit;
+   unsigned long long WTRc_limit_alone;
+   unsigned long long RCDWRc_limit;
+   unsigned long long RTWc_limit;
+   unsigned long long RTWc_limit_alone;
+   unsigned long long rwq_limit;
 
    //row locality, BLP and other statistics
-   unsigned long  access_num;
-   unsigned long  read_num;
-   unsigned long  write_num;
+   unsigned long long access_num;
+   unsigned long long read_num;
+   unsigned long long write_num;
    unsigned long long hits_num;
    unsigned long long hits_read_num;
    unsigned long long hits_write_num;
diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc
index ba81440..565fae1 100644
--- a/src/gpgpu-sim/gpu-cache.cc
+++ b/src/gpgpu-sim/gpu-cache.cc
@@ -256,7 +256,7 @@ enum cache_request_status tag_array::probe( new_addr_type addr, unsigned &idx, m
 
     unsigned invalid_line = (unsigned)-1;
     unsigned valid_line = (unsigned)-1;
-    unsigned valid_timestamp = (unsigned)-1;
+    unsigned long long valid_timestamp = (unsigned)-1;
 
     bool all_reserved = true;
 
@@ -654,7 +654,7 @@ enum cache_request_status cache_stats::select_stats_status(enum cache_request_st
 		return access;
 }
 
-unsigned &cache_stats::operator()(int access_type, int access_outcome, bool fail_outcome){
+unsigned long long &cache_stats::operator()(int access_type, int access_outcome, bool fail_outcome){
     ///
     /// Simple method to read/modify the stat corresponding to (access_type, access_outcome)
     /// Used overloaded () to avoid the need for separate read/write member functions
@@ -673,7 +673,7 @@ unsigned &cache_stats::operator()(int access_type, int access_outcome, bool fail
 	}
 }
 
-unsigned cache_stats::operator()(int access_type, int access_outcome, bool fail_outcome) const{
+unsigned long long cache_stats::operator()(int access_type, int access_outcome, bool fail_outcome) const{
     ///
     /// Const accessor into m_stats.
     ///
@@ -740,7 +740,7 @@ void cache_stats::print_stats(FILE *fout, const char *cache_name) const{
     std::string m_cache_name = cache_name;
     for (unsigned type = 0; type < NUM_MEM_ACCESS_TYPE; ++type) {
         for (unsigned status = 0; status < NUM_CACHE_REQUEST_STATUS; ++status) {
-            fprintf(fout, "\t%s[%s][%s] = %u\n",
+            fprintf(fout, "\t%s[%s][%s] = %llu\n",
                 m_cache_name.c_str(),
                 mem_access_type_str((enum mem_access_type)type),
                 cache_request_status_str((enum cache_request_status)status),
@@ -751,7 +751,7 @@ void cache_stats::print_stats(FILE *fout, const char *cache_name) const{
     }
     for (unsigned type = 0; type < NUM_MEM_ACCESS_TYPE; ++type) {
     	 if(total_access[type] > 0)
-    	  fprintf(fout, "\t%s[%s][%s] = %u\n",
+    	  fprintf(fout, "\t%s[%s][%s] = %llu\n",
 				m_cache_name.c_str(),
 				mem_access_type_str((enum mem_access_type)type),
 				"TOTAL_ACCESS",
@@ -788,13 +788,13 @@ void cache_sub_stats::print_port_stats(FILE *fout, const char *cache_name) const
     fprintf(fout, "%s_fill_port_util = %.3f\n", cache_name, fill_port_util); 
 }
 
-unsigned cache_stats::get_stats(enum mem_access_type *access_type, unsigned num_access_type, enum cache_request_status *access_status, unsigned num_access_status) const{
+unsigned long long cache_stats::get_stats(enum mem_access_type *access_type, unsigned num_access_type, enum cache_request_status *access_status, unsigned num_access_status) const{
     ///
     /// Returns a sum of the stats corresponding to each "access_type" and "access_status" pair.
     /// "access_type" is an array of "num_access_type" mem_access_types.
     /// "access_status" is an array of "num_access_status" cache_request_statuses.
     ///
-    unsigned total=0;
+    unsigned long long total=0;
     for(unsigned type =0; type < num_access_type; ++type){
         for(unsigned status=0; status < num_access_status; ++status){
             if(!check_valid((int)access_type[type], (int)access_status[status]))
diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h
index e663cf6..be281ce 100644
--- a/src/gpgpu-sim/gpu-cache.h
+++ b/src/gpgpu-sim/gpu-cache.h
@@ -119,9 +119,9 @@ struct cache_block_t {
     virtual enum cache_block_state get_status( mem_access_sector_mask_t sector_mask) = 0;
     virtual void set_status(enum cache_block_state m_status, mem_access_sector_mask_t sector_mask) = 0;
 
-    virtual unsigned get_last_access_time() = 0;
-    virtual void set_last_access_time(unsigned time, mem_access_sector_mask_t sector_mask) = 0;
-    virtual unsigned get_alloc_time() = 0;
+    virtual unsigned long long get_last_access_time() = 0;
+    virtual void set_last_access_time(unsigned long long time, mem_access_sector_mask_t sector_mask) = 0;
+    virtual unsigned long long get_alloc_time() = 0;
     virtual void set_ignore_on_fill(bool m_ignore, mem_access_sector_mask_t sector_mask) = 0;
     virtual void set_modified_on_fill(bool m_modified, mem_access_sector_mask_t sector_mask) = 0;
     virtual unsigned get_modified_size() = 0;
@@ -192,15 +192,15 @@ struct line_cache_block: public cache_block_t  {
 	    {
 	    	m_status = status;
 	    }
-		virtual unsigned get_last_access_time()
+		virtual unsigned long long get_last_access_time()
 		{
 			return m_last_access_time;
 		}
-		virtual void set_last_access_time(unsigned time, mem_access_sector_mask_t sector_mask)
+		virtual void set_last_access_time(unsigned long long time, mem_access_sector_mask_t sector_mask)
 	    {
 	    	m_last_access_time = time;
 	    }
-		virtual unsigned get_alloc_time()
+		virtual unsigned long long get_alloc_time()
 	    {
 	    	return m_alloc_time;
 	    }
@@ -229,9 +229,9 @@ struct line_cache_block: public cache_block_t  {
 
 
 private:
-	    unsigned         m_alloc_time;
-	    unsigned         m_last_access_time;
-	    unsigned         m_fill_time;
+	    unsigned long long     m_alloc_time;
+	    unsigned long long     m_last_access_time;
+	    unsigned long long     m_fill_time;
 	    cache_block_state    m_status;
 	    bool m_ignore_on_fill_status;
 	    bool m_set_modified_on_fill;
@@ -364,12 +364,12 @@ struct sector_cache_block : public cache_block_t {
 		m_status[sidx] = status;
 	}
 
-    virtual unsigned get_last_access_time()
+    virtual unsigned long long get_last_access_time()
 	{
 		return m_line_last_access_time;
 	}
 
-    virtual void set_last_access_time(unsigned time, mem_access_sector_mask_t sector_mask)
+    virtual void set_last_access_time(unsigned long long time, mem_access_sector_mask_t sector_mask)
 	{
 		unsigned sidx = get_sector_index(sector_mask);
 
@@ -377,7 +377,7 @@ struct sector_cache_block : public cache_block_t {
 		m_line_last_access_time = time;
 	}
 
-    virtual unsigned get_alloc_time()
+    virtual unsigned long long get_alloc_time()
 	{
 		return m_line_alloc_time;
 	}
@@ -915,10 +915,10 @@ private:
 /// Simple struct to maintain cache accesses, misses, pending hits, and reservation fails.
 ///
 struct cache_sub_stats{
-    unsigned accesses;
-    unsigned misses;
-    unsigned pending_hits;
-    unsigned res_fails;
+	unsigned long long accesses;
+	unsigned long long misses;
+	unsigned long long pending_hits;
+	unsigned long long res_fails;
 
     unsigned long long port_available_cycles; 
     unsigned long long data_port_busy_cycles; 
@@ -981,14 +981,14 @@ public:
     void inc_stats(int access_type, int access_outcome);
     void inc_fail_stats(int access_type, int fail_outcome);
     enum cache_request_status select_stats_status(enum cache_request_status probe, enum cache_request_status access) const;
-    unsigned &operator()(int access_type, int access_outcome, bool fail_outcome);
-    unsigned operator()(int access_type, int access_outcome, bool fail_outcome) const;
+    unsigned long long &operator()(int access_type, int access_outcome, bool fail_outcome);
+    unsigned long long operator()(int access_type, int access_outcome, bool fail_outcome) const;
     cache_stats operator+(const cache_stats &cs);
     cache_stats &operator+=(const cache_stats &cs);
     void print_stats(FILE *fout, const char *cache_name = "Cache_stats") const;
     void print_fail_stats(FILE *fout, const char *cache_name = "Cache_fail_stats") const;
 
-    unsigned get_stats(enum mem_access_type *access_type, unsigned num_access_type, enum cache_request_status *access_status, unsigned num_access_status)  const;
+    unsigned long long get_stats(enum mem_access_type *access_type, unsigned num_access_type, enum cache_request_status *access_status, unsigned num_access_status)  const;
     void get_sub_stats(struct cache_sub_stats &css) const;
 
     void sample_cache_port_utility(bool data_port_busy, bool fill_port_busy); 
@@ -996,8 +996,8 @@ private:
     bool check_valid(int type, int status) const;
     bool check_fail_valid(int type, int fail) const;
 
-    std::vector< std::vector<unsigned> > m_stats;
-    std::vector< std::vector<unsigned> > m_fail_stats;
+    std::vector< std::vector<unsigned long long> > m_stats;
+    std::vector< std::vector<unsigned long long> > m_fail_stats;
 
     unsigned long long m_cache_port_available_cycles; 
     unsigned long long m_cache_data_port_busy_cycles; 
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 8837aef..d837526 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -1163,19 +1163,19 @@ void gpgpu_sim::gpu_print_stat()
            m_memory_sub_partition[i]->accumulate_L2cache_stats(l2_stats);
            m_memory_sub_partition[i]->get_L2cache_sub_stats(l2_css);
 
-           fprintf( stdout, "L2_cache_bank[%d]: Access = %u, Miss = %u, Miss_rate = %.3lf, Pending_hits = %u, Reservation_fails = %u\n",
+           fprintf( stdout, "L2_cache_bank[%d]: Access = %llu, Miss = %llu, Miss_rate = %.3lf, Pending_hits = %llu, Reservation_fails = %llu\n",
                     i, l2_css.accesses, l2_css.misses, (double)l2_css.misses / (double)l2_css.accesses, l2_css.pending_hits, l2_css.res_fails);
 
            total_l2_css += l2_css;
        }
        if (!m_memory_config->m_L2_config.disabled() && m_memory_config->m_L2_config.get_num_lines()) {
           //L2c_print_cache_stat();
-          printf("L2_total_cache_accesses = %u\n", total_l2_css.accesses);
-          printf("L2_total_cache_misses = %u\n", total_l2_css.misses);
+          printf("L2_total_cache_accesses = %llu\n", total_l2_css.accesses);
+          printf("L2_total_cache_misses = %llu\n", total_l2_css.misses);
           if(total_l2_css.accesses > 0)
               printf("L2_total_cache_miss_rate = %.4lf\n", (double)total_l2_css.misses/(double)total_l2_css.accesses);
-          printf("L2_total_cache_pending_hits = %u\n", total_l2_css.pending_hits);
-          printf("L2_total_cache_reservation_fails = %u\n", total_l2_css.res_fails);
+          printf("L2_total_cache_pending_hits = %llu\n", total_l2_css.pending_hits);
+          printf("L2_total_cache_reservation_fails = %llu\n", total_l2_css.res_fails);
           printf("L2_total_cache_breakdown:\n");
           l2_stats.print_stats(stdout, "L2_cache_stats_breakdown");
           printf("L2_total_cache_reservation_fail_breakdown:\n");
diff --git a/src/gpgpu-sim/mem_latency_stat.cc b/src/gpgpu-sim/mem_latency_stat.cc
index c5452b9..7f6cde9 100644
--- a/src/gpgpu-sim/mem_latency_stat.cc
+++ b/src/gpgpu-sim/mem_latency_stat.cc
@@ -366,7 +366,7 @@ void memory_stats_t::memlatstat_print( unsigned n_mem, unsigned gpu_mem_n_bk )
          m = 0;
          printf("\n");
       }
-      printf("total reads: %d\n", k);
+      printf("total dram reads = %d\n", k);
       if (min_bank_accesses)
          printf("bank skew: %d/%d = %4.2f\n", max_bank_accesses, min_bank_accesses, (float)max_bank_accesses/min_bank_accesses);
       else
@@ -404,7 +404,7 @@ void memory_stats_t::memlatstat_print( unsigned n_mem, unsigned gpu_mem_n_bk )
          m = 0;
          printf("\n");
       }
-      printf("total reads: %d\n", k);
+      printf("total dram writes = %d\n", k);
       if (min_bank_accesses)
          printf("bank skew: %d/%d = %4.2f\n", max_bank_accesses, min_bank_accesses, (float)max_bank_accesses/min_bank_accesses);
       else
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index 25a765a..09be1f6 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -2542,13 +2542,13 @@ void gpgpu_sim::shader_print_cache_stats( FILE *fout ) const{
             m_cluster[i]->get_L1I_sub_stats(css);
             total_css += css;
         }
-        fprintf(fout, "\tL1I_total_cache_accesses = %u\n", total_css.accesses);
-        fprintf(fout, "\tL1I_total_cache_misses = %u\n", total_css.misses);
+        fprintf(fout, "\tL1I_total_cache_accesses = %llu\n", total_css.accesses);
+        fprintf(fout, "\tL1I_total_cache_misses = %llu\n", total_css.misses);
         if(total_css.accesses > 0){
             fprintf(fout, "\tL1I_total_cache_miss_rate = %.4lf\n", (double)total_css.misses / (double)total_css.accesses);
         }
-        fprintf(fout, "\tL1I_total_cache_pending_hits = %u\n", total_css.pending_hits);
-        fprintf(fout, "\tL1I_total_cache_reservation_fails = %u\n", total_css.res_fails);
+        fprintf(fout, "\tL1I_total_cache_pending_hits = %llu\n", total_css.pending_hits);
+        fprintf(fout, "\tL1I_total_cache_reservation_fails = %llu\n", total_css.res_fails);
     }
 
     // L1D
@@ -2559,18 +2559,18 @@ void gpgpu_sim::shader_print_cache_stats( FILE *fout ) const{
         for (unsigned i=0;i<m_shader_config->n_simt_clusters;i++){
             m_cluster[i]->get_L1D_sub_stats(css);
 
-            fprintf( stdout, "\tL1D_cache_core[%d]: Access = %d, Miss = %d, Miss_rate = %.3lf, Pending_hits = %u, Reservation_fails = %u\n",
+            fprintf( stdout, "\tL1D_cache_core[%d]: Access = %llu, Miss = %llu, Miss_rate = %.3lf, Pending_hits = %llu, Reservation_fails = %llu\n",
                      i, css.accesses, css.misses, (double)css.misses / (double)css.accesses, css.pending_hits, css.res_fails);
 
             total_css += css;
         }
-        fprintf(fout, "\tL1D_total_cache_accesses = %u\n", total_css.accesses);
-        fprintf(fout, "\tL1D_total_cache_misses = %u\n", total_css.misses);
+        fprintf(fout, "\tL1D_total_cache_accesses = %llu\n", total_css.accesses);
+        fprintf(fout, "\tL1D_total_cache_misses = %llu\n", total_css.misses);
         if(total_css.accesses > 0){
             fprintf(fout, "\tL1D_total_cache_miss_rate = %.4lf\n", (double)total_css.misses / (double)total_css.accesses);
         }
-        fprintf(fout, "\tL1D_total_cache_pending_hits = %u\n", total_css.pending_hits);
-        fprintf(fout, "\tL1D_total_cache_reservation_fails = %u\n", total_css.res_fails);
+        fprintf(fout, "\tL1D_total_cache_pending_hits = %llu\n", total_css.pending_hits);
+        fprintf(fout, "\tL1D_total_cache_reservation_fails = %llu\n", total_css.res_fails);
         total_css.print_port_stats(fout, "\tL1D_cache"); 
     }
 
@@ -2583,13 +2583,13 @@ void gpgpu_sim::shader_print_cache_stats( FILE *fout ) const{
             m_cluster[i]->get_L1C_sub_stats(css);
             total_css += css;
         }
-        fprintf(fout, "\tL1C_total_cache_accesses = %u\n", total_css.accesses);
-        fprintf(fout, "\tL1C_total_cache_misses = %u\n", total_css.misses);
+        fprintf(fout, "\tL1C_total_cache_accesses = %llu\n", total_css.accesses);
+        fprintf(fout, "\tL1C_total_cache_misses = %llu\n", total_css.misses);
         if(total_css.accesses > 0){
             fprintf(fout, "\tL1C_total_cache_miss_rate = %.4lf\n", (double)total_css.misses / (double)total_css.accesses);
         }
-        fprintf(fout, "\tL1C_total_cache_pending_hits = %u\n", total_css.pending_hits);
-        fprintf(fout, "\tL1C_total_cache_reservation_fails = %u\n", total_css.res_fails);
+        fprintf(fout, "\tL1C_total_cache_pending_hits = %llu\n", total_css.pending_hits);
+        fprintf(fout, "\tL1C_total_cache_reservation_fails = %llu\n", total_css.res_fails);
     }
 
     // L1T
@@ -2601,13 +2601,13 @@ void gpgpu_sim::shader_print_cache_stats( FILE *fout ) const{
             m_cluster[i]->get_L1T_sub_stats(css);
             total_css += css;
         }
-        fprintf(fout, "\tL1T_total_cache_accesses = %u\n", total_css.accesses);
-        fprintf(fout, "\tL1T_total_cache_misses = %u\n", total_css.misses);
+        fprintf(fout, "\tL1T_total_cache_accesses = %llu\n", total_css.accesses);
+        fprintf(fout, "\tL1T_total_cache_misses = %llu\n", total_css.misses);
         if(total_css.accesses > 0){
             fprintf(fout, "\tL1T_total_cache_miss_rate = %.4lf\n", (double)total_css.misses / (double)total_css.accesses);
         }
-        fprintf(fout, "\tL1T_total_cache_pending_hits = %u\n", total_css.pending_hits);
-        fprintf(fout, "\tL1T_total_cache_reservation_fails = %u\n", total_css.res_fails);
+        fprintf(fout, "\tL1T_total_cache_pending_hits = %llu\n", total_css.pending_hits);
+        fprintf(fout, "\tL1T_total_cache_reservation_fails = %llu\n", total_css.res_fails);
     }
 }