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authorDongdong Li <[email protected]>2013-11-22 11:32:14 -0800
committerAndrew Boktor <[email protected]>2014-08-14 13:50:59 -0700
commitbdc0e550448f04c7c8f030b7421209bae37e651d (patch)
treed59135ebbc05d7ddcd77c3b647e647e159073359 /src/intersim2/.svn/pristine/f9
parent3f74773ce1ffe8ed5044a103d84459b56d4e9c20 (diff)
Add .svn file so other people can keep update with changes from Stanford
Code Review: Issue 103001 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17411]
Diffstat (limited to 'src/intersim2/.svn/pristine/f9')
-rw-r--r--src/intersim2/.svn/pristine/f9/f9cf31dbae18e4e1930dc0632175d9c420d3c067.svn-base107
-rw-r--r--src/intersim2/.svn/pristine/f9/f9ef776d4727c7e2a1e057f5839da76e854ccae5.svn-base40
2 files changed, 147 insertions, 0 deletions
diff --git a/src/intersim2/.svn/pristine/f9/f9cf31dbae18e4e1930dc0632175d9c420d3c067.svn-base b/src/intersim2/.svn/pristine/f9/f9cf31dbae18e4e1930dc0632175d9c420d3c067.svn-base
new file mode 100644
index 0000000..d58d4a1
--- /dev/null
+++ b/src/intersim2/.svn/pristine/f9/f9cf31dbae18e4e1930dc0632175d9c420d3c067.svn-base
@@ -0,0 +1,107 @@
+// $Id$
+
+/*
+ Copyright (c) 2007-2012, Trustees of The Leland Stanford Junior University
+ All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+ Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*flit.cpp
+ *
+ *flit struct is a flit, carries all the control signals that a flit needs
+ *Add additional signals as necessary. Flits has no concept of length
+ *it is a singluar object.
+ *
+ *When adding objects make sure to set a default value in this constructor
+ */
+
+#include "booksim.hpp"
+#include "flit.hpp"
+
+stack<Flit *> Flit::_all;
+stack<Flit *> Flit::_free;
+
+ostream& operator<<( ostream& os, const Flit& f )
+{
+ os << " Flit ID: " << f.id << " (" << &f << ")"
+ << " Packet ID: " << f.pid
+ << " Type: " << f.type
+ << " Head: " << f.head
+ << " Tail: " << f.tail << endl;
+ os << " Source: " << f.src << " Dest: " << f.dest << " Intm: "<<f.intm<<endl;
+ os << " Creation time: " << f.ctime << " Injection time: " << f.itime << " Arrival time: " << f.atime << " Phase: "<<f.ph<< endl;
+ os << " VC: " << f.vc << endl;
+ return os;
+}
+
+Flit::Flit()
+{
+ Reset();
+}
+
+void Flit::Reset()
+{
+ type = ANY_TYPE ;
+ vc = -1 ;
+ cl = -1 ;
+ head = false ;
+ tail = false ;
+ ctime = -1 ;
+ itime = -1 ;
+ atime = -1 ;
+ id = -1 ;
+ pid = -1 ;
+ hops = 0 ;
+ watch = false ;
+ record = false ;
+ intm = 0;
+ src = -1;
+ dest = -1;
+ pri = 0;
+ intm =-1;
+ ph = -1;
+ data = 0;
+}
+
+Flit * Flit::New() {
+ Flit * f;
+ if(_free.empty()) {
+ f = new Flit;
+ _all.push(f);
+ } else {
+ f = _free.top();
+ f->Reset();
+ _free.pop();
+ }
+ return f;
+}
+
+void Flit::Free() {
+ _free.push(this);
+}
+
+void Flit::FreeAll() {
+ while(!_all.empty()) {
+ delete _all.top();
+ _all.pop();
+ }
+}
diff --git a/src/intersim2/.svn/pristine/f9/f9ef776d4727c7e2a1e057f5839da76e854ccae5.svn-base b/src/intersim2/.svn/pristine/f9/f9ef776d4727c7e2a1e057f5839da76e854ccae5.svn-base
new file mode 100644
index 0000000..024104e
--- /dev/null
+++ b/src/intersim2/.svn/pristine/f9/f9ef776d4727c7e2a1e057f5839da76e854ccae5.svn-base
@@ -0,0 +1,40 @@
+// $Id$
+
+// Copyright (c) 2007-2012, Trustees of The Leland Stanford Junior University
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+// Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+// POSSIBILITY OF SUCH DAMAGE.
+
+//simple 8X8 torus under injection mode
+
+
+// Topology
+topology = torus;
+k = 8;
+n = 2;
+// Routing
+routing_function = dim_order;
+// Flow control
+num_vcs = 2;
+// Traffic
+traffic = uniform;
+injection_rate = 0.15;