diff options
| author | Tor Aamodt <[email protected]> | 2010-10-05 13:34:47 -0800 |
|---|---|---|
| committer | Tor Aamodt <[email protected]> | 2010-10-05 13:34:47 -0800 |
| commit | e0f1b4359832ba2952ddcff3a400cd7e1e3d02b5 (patch) | |
| tree | 12f3dbd8366e15b4a9a299b0368df6fafea11847 /src/intersim | |
| parent | d859e08188eb5863888a9b018cf4aec6d0419c40 (diff) | |
broken change list: builds, but does not run, yet
refactoring: create warp_inst_t that provides notion of a group of scalar instructions
traveling down the pipeline.
delete DWF
delete MIMD
delete warp_tracker
delete old writeback stage, replace it with a stub that just writes back everything
delete old pipeline model
current status: MSHR's need to change to deal with the new structure
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7814]
Diffstat (limited to 'src/intersim')
| -rw-r--r-- | src/intersim/interconnect_interface.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intersim/interconnect_interface.cpp b/src/intersim/interconnect_interface.cpp index 56b2d18..0ed7150 100644 --- a/src/intersim/interconnect_interface.cpp +++ b/src/intersim/interconnect_interface.cpp @@ -556,7 +556,7 @@ void time_vector_update_icnt_injected(void* data, int input) { mem_fetch* mf = (mem_fetch*) data; if( mf->get_mshr() && !mf->get_mshr()->isinst() ) { - unsigned uid=mf->get_is_write()? mf->get_request_uid() : mf->get_mshr()->get_insts_uid(); + unsigned uid=mf->get_request_uid(); long int cycle = gpu_sim_cycle + gpu_tot_sim_cycle; int req_type = mf->get_is_write()? WT_REQ : RD_REQ; if (is_mem(input)) { |