- Checkpointing new support for concurrent kernel execution (CUDA only, not OpenCL)

  This changelist adds full support for streams supported by a new class,
  stream_manager and enables concurrent execution of kernels from different
  streams.

- fast_regression.sh fails for simpleMultiCopy, simpleStreams (other tests
  passing)

** Known issues **
- Kernel parameter passing is not done correctly for concurrent kernel execution
  (somehow concurrentKernels is not affected by this): the parameters are
  stored inside function_info, which is shared among parallel kernel launches
  so that the values passed into the launch are likely to get overwritten if
  multiple grids are launched in parallel streams.

- Statistics are printed out whenever the simulation thread runs out of
  cuda commands (doesn't make sense to print out when a kernel ends during
  concurrent kernel execution).  This will probably require further tweaking
  so as to be more compatible with data collection scripts.

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8302]

1 files changed, 294 insertions, 0 deletions

diff --git a/src/stream_manager.h b/src/stream_manager.h
new file mode 100644
index 0000000..d47f0c7
--- /dev/null
+++ b/src/stream_manager.h
@@ -0,0 +1,294 @@
+/*
+ * stream_manager.h
+ *
+ * Copyright © 2009 by Tor M. Aamodt, Wilson W. L. Fung, Ali Bakhoda, 
+ * George L. Yuan and the University of British Columbia, Vancouver, 
+ * BC V6T 1Z4, All Rights Reserved.
+ * 
+ * THIS IS A LEGAL DOCUMENT BY DOWNLOADING GPGPU-SIM, YOU ARE AGREEING TO THESE
+ * TERMS AND CONDITIONS.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * NOTE: The files libcuda/cuda_runtime_api.c and src/cuda-sim/cuda-math.h
+ * are derived from the CUDA Toolset available from http://www.nvidia.com/cuda
+ * (property of NVIDIA).  The files benchmarks/BlackScholes/ and 
+ * benchmarks/template/ are derived from the CUDA SDK available from 
+ * http://www.nvidia.com/cuda (also property of NVIDIA).  The files from 
+ * src/intersim/ are derived from Booksim (a simulator provided with the 
+ * textbook "Principles and Practices of Interconnection Networks" available 
+ * from http://cva.stanford.edu/books/ppin/). As such, those files are bound by 
+ * the corresponding legal terms and conditions set forth separately (original 
+ * copyright notices are left in files from these sources and where we have 
+ * modified a file our copyright notice appears before the original copyright 
+ * notice).  
+ * 
+ * Using this version of GPGPU-Sim requires a complete installation of CUDA 
+ * which is distributed seperately by NVIDIA under separate terms and 
+ * conditions.  To use this version of GPGPU-Sim with OpenCL requires a
+ * recent version of NVIDIA's drivers which support OpenCL.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 
+ * 3. Neither the name of the University of British Columbia nor the names of
+ * its contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ * 
+ * 4. This version of GPGPU-SIM is distributed freely for non-commercial use only.  
+ *  
+ * 5. No nonprofit user may place any restrictions on the use of this software,
+ * including as modified by the user, by any other authorized user.
+ * 
+ * 6. GPGPU-SIM was developed primarily by Tor M. Aamodt, Wilson W. L. Fung, 
+ * Ali Bakhoda, George L. Yuan, at the University of British Columbia, 
+ * Vancouver, BC V6T 1Z4
+ */
+
+#ifndef STREAM_MANAGER_H_INCLUDED
+#define STREAM_MANAGER_H_INCLUDED
+
+#include "abstract_hardware_model.h"
+#include <list>
+#include <pthread.h>
+#include <time.h>
+
+//class stream_barrier {
+//public:
+//    stream_barrier() { m_pending_streams=0; }
+//    void inc() { m_pending_streams++; }
+//    void dec() { assert(m_pending_streams); m_pending_streams--; }
+//    unsigned value() const { return m_pending_streams; }
+//private:
+//    unsigned m_pending_streams;
+//};
+
+enum stream_operation_type {
+    stream_no_op,
+    stream_memcpy_host_to_device,
+    stream_memcpy_device_to_host,
+    stream_memcpy_device_to_device,
+    stream_memcpy_to_symbol,
+    stream_memcpy_from_symbol,
+    stream_kernel_launch,
+    stream_event
+};
+
+class stream_operation {
+public:
+    stream_operation()
+    {
+        m_type = stream_no_op;
+        m_stream = NULL;
+        m_done=true;
+    }
+    stream_operation( const void *src, const char *symbol, size_t count, size_t offset, struct CUstream_st *stream )
+    {
+        m_stream = stream;
+        m_type=stream_memcpy_to_symbol;
+        m_host_address_src=src;
+        m_symbol=symbol;
+        m_cnt=count;
+        m_offset=offset;
+
+        m_done=false;
+    }
+    stream_operation( const char *symbol, void *dst, size_t count, size_t offset, struct CUstream_st *stream )
+    {
+        m_stream = stream;
+        m_type=stream_memcpy_from_symbol;
+        m_host_address_dst=dst;
+        m_symbol=symbol;
+        m_cnt=count;
+        m_offset=offset;
+        m_done=false;
+    }
+    stream_operation( const kernel_info_t &kernel, bool sim_mode, struct CUstream_st *stream )
+    {
+        m_type=stream_kernel_launch;
+        m_kernel=kernel;
+        m_sim_mode=sim_mode;
+        m_stream=stream;
+        m_done=false;
+    }
+    stream_operation( class CUevent_st *e, struct CUstream_st *stream )
+    {
+        m_type=stream_event;
+        m_event=e;
+        m_stream=stream;
+        m_done=false;
+    }
+    stream_operation( const void *host_address_src, size_t device_address_dst, size_t cnt, struct CUstream_st *stream )
+    {
+        m_type=stream_memcpy_host_to_device;
+        m_host_address_src  =host_address_src;
+        m_device_address_dst=device_address_dst;
+        m_host_address_dst=NULL;
+        m_device_address_src=0;
+        m_cnt=cnt;
+        m_stream=stream;
+        m_sim_mode=false;
+        m_done=false;
+    }
+    stream_operation( size_t device_address_src, void *host_address_dst, size_t cnt, struct CUstream_st *stream  )
+    {
+        m_type=stream_memcpy_device_to_host;
+        m_device_address_src=device_address_src;
+        m_host_address_dst=host_address_dst;
+        m_device_address_dst=0;
+        m_host_address_src=NULL;
+        m_cnt=cnt;
+        m_stream=stream;
+        m_sim_mode=false;
+        m_done=false;
+    }
+    stream_operation( size_t device_address_src, size_t device_address_dst, size_t cnt, struct CUstream_st *stream  )
+    {
+        m_type=stream_memcpy_device_to_device;
+        m_device_address_src=device_address_src;
+        m_device_address_dst=device_address_dst;
+        m_host_address_src=NULL;
+        m_host_address_dst=NULL;
+        m_cnt=cnt;
+        m_stream=stream;
+        m_sim_mode=false;
+        m_done=false;
+    }
+
+    //void add_barrier( stream_barrier *b ) { m_barrier=b; }
+    //stream_barrier *get_barrier() { return m_barrier; }
+    bool is_kernel() const { return m_type == stream_kernel_launch; }
+    bool is_mem() const {
+        return m_type == stream_memcpy_host_to_device ||
+               m_type == stream_memcpy_device_to_host ||
+               m_type == stream_memcpy_host_to_device;
+    }
+    bool is_noop() const { return m_type == stream_no_op; }
+    bool is_done() const { return m_done; }
+    kernel_info_t &get_kernel() { return m_kernel; }
+    void do_operation( gpgpu_sim *gpu );
+    void print( FILE *fp ) const;
+    struct CUstream_st *get_stream() { return m_stream; }
+    void set_stream( CUstream_st *stream ) { m_stream = stream; }
+
+private:
+    struct CUstream_st *m_stream;
+
+    bool m_done;
+
+    stream_operation_type m_type;
+    size_t      m_device_address_dst;
+    size_t      m_device_address_src;
+    void       *m_host_address_dst;
+    const void *m_host_address_src;
+    size_t      m_cnt;
+
+    const char *m_symbol;
+    size_t m_offset;
+
+    bool m_sim_mode;
+    kernel_info_t m_kernel;
+    class CUevent_st *m_event;
+
+    //stream_barrier *m_barrier;
+};
+
+class CUevent_st {
+public:
+   CUevent_st( bool blocking )
+   {
+      m_uid = ++m_next_event_uid;
+      m_blocking = blocking;
+      m_updates = 0;
+      m_wallclock = 0;
+      m_gpu_tot_sim_cycle = 0;
+      m_done = false;
+   }
+   void update( double cycle, time_t clk )
+   {
+      m_updates++;
+      m_wallclock=clk;
+      m_gpu_tot_sim_cycle=cycle;
+      m_done = true;
+   }
+   //void set_done() { assert(!m_done); m_done=true; }
+   int get_uid() const { return m_uid; }
+   unsigned num_updates() const { return m_updates; }
+   bool done() const { return m_done; }
+   time_t clock() const { return m_wallclock; }
+private:
+   int m_uid;
+   bool m_blocking;
+   bool m_done;
+   int m_updates;
+   time_t m_wallclock;
+   double m_gpu_tot_sim_cycle;
+
+   static int m_next_event_uid;
+};
+
+struct CUstream_st {
+public:
+    CUstream_st(); 
+    bool empty();
+    bool busy();
+    void synchronize();
+    void push( const stream_operation &op );
+    void record_next_done();
+    stream_operation next();
+    stream_operation &front() { return m_operations.front(); }
+    void print( FILE *fp );
+    unsigned get_uid() const { return m_uid; }
+
+private:
+    unsigned m_uid;
+    static unsigned sm_next_stream_uid;
+
+    std::list<stream_operation> m_operations;
+    bool m_pending; // front operation has started but not yet completed
+
+    pthread_mutex_t m_lock; // ensure only one host or gpu manipulates stream operation at one time
+};
+
+class stream_manager {
+public:
+    stream_manager( gpgpu_sim *gpu, bool cuda_launch_blocking );
+    void register_finished_kernel( unsigned grid_uid );
+    stream_operation front();
+    void add_stream( CUstream_st *stream );
+    void destroy_stream( CUstream_st *stream );
+    bool concurrent_streams_empty();
+    bool empty();
+    void print( FILE *fp);
+    void push( stream_operation op );
+
+private:
+    void print_impl( FILE *fp);
+
+    bool m_cuda_launch_blocking;
+    gpgpu_sim *m_gpu;
+    std::list<CUstream_st *> m_streams;
+    std::map<unsigned,CUstream_st *> m_grid_id_to_stream;
+    CUstream_st m_stream_zero;
+    bool m_service_stream_zero;
+    pthread_mutex_t m_lock;
+};
+
+#endif