Merging

//depot/gpgpu_sim_research/fermi_tim/...

to //depot/gpgpu_sim_research/fermi/...

Integrating CLs up to 15295. Descriptions of these CL's are included.

***
A couple changes to aeriel-vision for warp issue plot support
***
More arielvision changes to support the variable-entry length stacked bar chart
***
Properly printing the right resolution of dynamic warp ids
***.
Generalized the scheduler code and added detailed statistics for which warps issue each cycle.
   Verified the execution of the LRR scheduler - still have to get the two level scheduler to work.
***
Implementing the 2lvl scehduler has it has been originally coded.
   LRR on both the inner and outer levels
***
Adding in a debug tracing system to GPGPU-Sim.
   I am sick of writing debug code - then having to comment out, ifdef out or delete it to checkin.
   This also allows for print streams so the user can decided which traces they would like to see.
   Every print in GPGPU-Sim should go through this system - then it will be really easy to only get the information you want and more importantly people will (a) write and (b) checkin code that actually profiles what they are building.
   Reading tracefiles is superiour in many ways to single stepping since you can print the world and just vet the logfile for what you need.
   This also fascilitates advice from the Debugging Rules! book which states that you should never throw away a debugging tool.  Having debug prints that don't get thrown away is big.
***
   Allowing the trace to be specified in the Make.
   Run Make TRACE=0 to compile the code without any traces
***
   Allowing prints from the performance sim to get the actual ptx instruction text
***
Getting the two level scheduler to actaully work...
   What is released in fermi does not work at all - it effectively performs "static warp limit" from my CCWS paper.
   Warps are never demoted from the active list since the functionality checking to see if they are waiting on a longop is completly broken.
   Maybe if the original author had access to the tracing functions this would not have happened.
   The islongop test was completely broken.  It did not mark the register as used, it marked the register number in the instruction as used.
   For example if this instruction was creating a long op:
   ld r6 [r1]
   It would mark register 0 as waiting for a long op (since it is register 0 of the two registers in this instruction), not register 6.
   Additionally, whenever ANY instruction from a warp releases registers, ALL the longops being tracked for this warp get cleared....
   The only way anyone ever thought this worked is if they did not test it....
***
Reworking the warp schedulers to share common code.
   Making the GTX480 use gto by default. I am not sure wht they really use, but it really can't be LRR.
   Also adding in a new file for custom shared trace defines. These are useful when you want a print that has some
   additional criteria or information printed.
   Verified that the schedulers all work to a first order based on traces.
***
Making it so you can run the stats collection scripts from any directory.
   Also allow the caller to specify a stats file instead of just assume its always the same one

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15296]

1 files changed, 55 insertions, 0 deletions

diff --git a/src/trace.cc b/src/trace.cc
new file mode 100644
index 0000000..05b9d6b
--- /dev/null
+++ b/src/trace.cc
@@ -0,0 +1,55 @@
+// Copyright (c) 2009-2013, Tor M. Aamodt, Timothy Rogers,
+// The University of British Columbia
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+// Redistributions in binary form must reproduce the above copyright notice, this
+// list of conditions and the following disclaimer in the documentation and/or
+// other materials provided with the distribution.
+// Neither the name of The University of British Columbia nor the names of its
+// contributors may be used to endorse or promote products derived from this
+// software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#include "trace.h"
+#include "string.h"
+
+namespace Trace {
+
+
+#define TS_TUP_BEGIN(X) const char* trace_streams_str[] = {
+#define TS_TUP(X) #X
+#define TS_TUP_END(X) };
+#include "trace_streams.tup"
+#undef TS_TUP_BEGIN
+#undef TS_TUP
+#undef TS_TUP_END
+
+    bool enabled = false;
+    int sampling_core = 0;
+    bool trace_streams_enabled[NUM_TRACE_STREAMS] = {false};
+    const char* config_str;
+
+    void init()
+    {
+        for ( unsigned i = 0; i < NUM_TRACE_STREAMS; ++i ) {
+            if ( strstr( config_str, trace_streams_str[i] ) != NULL ) {
+                trace_streams_enabled[ i ] = true;
+            }
+        }
+    }
+}