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authorJRPAN <[email protected]>2021-02-15 12:42:14 -0500
committerJRPAN <[email protected]>2021-05-18 16:33:07 -0400
commit0f3030542e1987543c5fd4e497f7d422422e73fa (patch)
tree6e12b95631f33bc43cff85487ec67efce83adfd6 /src
parent585dcf5dc05d6343314600114ebcea8c719e7423 (diff)
dirty counter added. NO increamenting yet
Diffstat (limited to 'src')
-rw-r--r--src/gpgpu-sim/gpu-cache.cc24
-rw-r--r--src/gpgpu-sim/gpu-cache.h6
2 files changed, 19 insertions, 11 deletions
diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc
index 1c36d22..763705f 100644
--- a/src/gpgpu-sim/gpu-cache.cc
+++ b/src/gpgpu-sim/gpu-cache.cc
@@ -284,15 +284,20 @@ enum cache_request_status tag_array::probe(new_addr_type addr, unsigned &idx,
invalid_line = index;
} else {
// valid line : keep track of most appropriate replacement candidate
- if (m_config.m_replacement_policy == LRU) {
- if (line->get_last_access_time() < valid_timestamp) {
- valid_timestamp = line->get_last_access_time();
- valid_line = index;
- }
- } else if (m_config.m_replacement_policy == FIFO) {
- if (line->get_alloc_time() < valid_timestamp) {
- valid_timestamp = line->get_alloc_time();
- valid_line = index;
+ if (!line->get_status(mask) == MODIFIED ||
+ 100 * m_dirty/(m_config.m_nset * m_config.m_assoc) >= m_config.m_wr_percent) {
+ // don't evict write until dirty lines reach threshold
+ // make sure at least 1 candidate is assigned
+ if (m_config.m_replacement_policy == LRU) {
+ if (line->get_last_access_time() < valid_timestamp) {
+ valid_timestamp = line->get_last_access_time();
+ valid_line = index;
+ }
+ } else if (m_config.m_replacement_policy == FIFO) {
+ if (line->get_alloc_time() < valid_timestamp) {
+ valid_timestamp = line->get_alloc_time();
+ valid_line = index;
+ }
}
}
}
@@ -418,6 +423,7 @@ void tag_array::flush() {
if (m_lines[i]->is_modified_line()) {
for (unsigned j = 0; j < SECTOR_CHUNCK_SIZE; j++)
m_lines[i]->set_status(INVALID, mem_access_sector_mask_t().set(j));
+ m_dirty--;
}
is_used = false;
diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h
index 00c09ae..9dbfe82 100644
--- a/src/gpgpu-sim/gpu-cache.h
+++ b/src/gpgpu-sim/gpu-cache.h
@@ -498,10 +498,10 @@ class cache_config {
char ct, rp, wp, ap, mshr_type, wap, sif;
int ntok =
- sscanf(config, "%c:%u:%u:%u,%c:%c:%c:%c:%c,%c:%u:%u,%u:%u,%u", &ct,
+ sscanf(config, "%c:%u:%u:%u,%c:%c:%c:%c:%c,%c:%u:%u,%u:%u,%u,%u", &ct,
&m_nset, &m_line_sz, &m_assoc, &rp, &wp, &ap, &wap, &sif,
&mshr_type, &m_mshr_entries, &m_mshr_max_merge,
- &m_miss_queue_size, &m_result_fifo_entries, &m_data_port_width);
+ &m_miss_queue_size, &m_result_fifo_entries, &m_data_port_width, &m_wr_percent);
if (ntok < 12) {
if (!strcmp(config, "none")) {
@@ -801,6 +801,7 @@ class cache_config {
unsigned m_data_port_width; //< number of byte the cache can access per cycle
enum set_index_function
m_set_index_function; // Hash, linear, or custom set index function
+ unsigned m_wr_percent;
friend class tag_array;
friend class baseline_cache;
@@ -897,6 +898,7 @@ class tag_array {
// allocated but not filled
unsigned m_res_fail;
unsigned m_sector_miss;
+ unsigned m_dirty;
// performance counters for calculating the amount of misses within a time
// window