diff options
| author | Tim Rogers <[email protected]> | 2011-12-01 15:25:21 -0800 |
|---|---|---|
| committer | Andrew Boktor <[email protected]> | 2014-08-14 13:19:01 -0700 |
| commit | 1c5a166922911a68d6ea5479844cb9b704153079 (patch) | |
| tree | d13cfd1e467e5a0008fc3e6bee32dfa601275dae /src | |
| parent | eb9370d0e0c192e95365cfee3408e2affe1bd3bb (diff) | |
bz 122 - Fixing the rate descpency between ldst_unit::cycle and ldst_unit::writeback
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11085]
Diffstat (limited to 'src')
| -rw-r--r-- | src/gpgpu-sim/shader.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index 4ce7536..b37ceef 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -756,7 +756,6 @@ void scheduler_unit::cycle() void shader_core_ctx::read_operands() { - m_operand_collector.step(); } address_type coalesced_segment(address_type addr, unsigned segment_size_lg2bytes) @@ -855,7 +854,6 @@ void shader_core_ctx::writeback() m_gpu->gpu_sim_insn += pipe_reg->active_count(); pipe_reg->clear(); } - m_ldst_unit->writeback(); } bool ldst_unit::shared_cycle( warp_inst_t &inst, mem_stage_stall_type &rc_fail, mem_stage_access_type &fail_type) @@ -1156,6 +1154,8 @@ unsigned ldst_unit::clock_multiplier() const void ldst_unit::cycle() { + writeback(); + m_operand_collector->step(); for( unsigned stage=0; (stage+1)<m_pipeline_depth; stage++ ) if( m_pipeline_reg[stage]->empty() && !m_pipeline_reg[stage+1]->empty() ) move_warp(m_pipeline_reg[stage], m_pipeline_reg[stage+1]); |