Change 180 by jain156@akshayj-lt1 on 2017/03/30 11:48:07

       Added Memory Access breakdown statistics.
       Divided INST stats into INST type and INST Mem accesses.

4 files changed, 28 insertions, 27 deletions

diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc
index 2f166aa..17a7798 100644
--- a/src/cuda-sim/cuda-sim.cc
+++ b/src/cuda-sim/cuda-sim.cc
@@ -52,8 +52,10 @@
 
 int gpgpu_ptx_instruction_classification;
 void ** g_inst_classification_stat = NULL;
+void ** g_inst_mem_classification_stat = NULL;
 void ** g_inst_op_classification_stat= NULL;
 int g_ptx_kernel_count = -1; // used for classification stat collection purposes 
+int g_ptx_kernel_count_prev = -1; // used for classification stat collection purposes 
 int g_debug_execution = 0;
 int g_debug_thread_uid = 0;
 addr_t g_debug_pc = 0xBEEF1518;
@@ -1240,12 +1242,16 @@ void init_inst_classification_stat()
    #define MAX_CLASS_KER 1024
    char kernelname[MAX_CLASS_KER] ="";
    if (!g_inst_classification_stat) g_inst_classification_stat = (void**)calloc(MAX_CLASS_KER, sizeof(void*));
-   snprintf(kernelname, MAX_CLASS_KER, "Kernel %d Classification\n",g_ptx_kernel_count  );         
+   snprintf(kernelname, MAX_CLASS_KER, "Kernel %d INST Classification",g_ptx_kernel_count  );         
    assert( g_ptx_kernel_count < MAX_CLASS_KER ) ; // a static limit on number of kernels increase it if it fails! 
    g_inst_classification_stat[g_ptx_kernel_count] = StatCreate(kernelname,1,20);
+   if (!g_inst_mem_classification_stat) g_inst_mem_classification_stat = (void**)calloc(MAX_CLASS_KER, sizeof(void*));
+   snprintf(kernelname, MAX_CLASS_KER, "Kernel %d MEM Classification",g_ptx_kernel_count  );         
+   g_inst_mem_classification_stat[g_ptx_kernel_count] = StatCreate(kernelname,1,20);
    if (!g_inst_op_classification_stat) g_inst_op_classification_stat = (void**)calloc(MAX_CLASS_KER, sizeof(void*));
-   snprintf(kernelname, MAX_CLASS_KER, "Kernel %d OP Classification\n",g_ptx_kernel_count  );         
+   snprintf(kernelname, MAX_CLASS_KER, "Kernel %d OP Classification",g_ptx_kernel_count  );         
    g_inst_op_classification_stat[g_ptx_kernel_count] = StatCreate(kernelname,1,100);
+   g_ptx_kernel_count_prev++;
 }
 
 static unsigned get_tex_datasize( const ptx_instruction *pI, ptx_thread_info *thread )
@@ -1323,6 +1329,15 @@ void ptx_thread_info::ptx_exec_inst( warp_inst_t &inst, unsigned lane_id)
       delete pJ;
       pI = pI_saved;
       
+      if ( gpgpu_ptx_instruction_classification ) {
+         init_inst_classification_stat();
+         if (op_classification)
+            StatAddSample( g_inst_classification_stat[g_ptx_kernel_count],  op_classification);
+         if (pI->get_space().get_type())
+            StatAddSample( g_inst_mem_classification_stat[g_ptx_kernel_count], ( int )pI->get_space().get_type());
+         StatAddSample( g_inst_op_classification_stat[g_ptx_kernel_count], (int)  pI->get_opcode() );
+      }
+
       // Run exit instruction if exit option included
       if(pI->is_exit())
          exit_impl(pI,this);
@@ -1408,27 +1423,6 @@ void ptx_thread_info::ptx_exec_inst( warp_inst_t &inst, unsigned lane_id)
    if(!(this->m_functionalSimulationMode))
        ptx_file_line_stats_add_exec_count(pI);
    
-   if ( gpgpu_ptx_instruction_classification ) {
-      init_inst_classification_stat();
-      unsigned space_type=0;
-      switch ( pI->get_space().get_type() ) {
-      case global_space: space_type = 10; break;
-      case local_space:  space_type = 11; break; 
-      case tex_space:    space_type = 12; break; 
-      case surf_space:   space_type = 13; break; 
-      case param_space_kernel:
-      case param_space_local:
-                         space_type = 14; break; 
-      case shared_space: space_type = 15; break; 
-      case const_space:  space_type = 16; break;
-      default: 
-         space_type = 0 ;
-         break;
-      }
-      StatAddSample( g_inst_classification_stat[g_ptx_kernel_count],  op_classification);
-      if (space_type) StatAddSample( g_inst_classification_stat[g_ptx_kernel_count], ( int )space_type);
-      StatAddSample( g_inst_op_classification_stat[g_ptx_kernel_count], (int)  pI->get_opcode() );
-   }
    if ( (g_ptx_sim_num_insn % 100000) == 0 ) {
       dim3 ctaid = get_ctaid();
       dim3 tid = get_tid();
@@ -1848,8 +1842,10 @@ void gpgpu_cuda_ptx_sim_main_func( kernel_info_t &kernel, bool openCL )
 
    //******PRINTING*******
    printf( "GPGPU-Sim: Done functional simulation (%u instructions simulated).\n", g_ptx_sim_num_insn );
+   fflush(stdout); 
    if ( gpgpu_ptx_instruction_classification ) {
-      StatDisp( g_inst_classification_stat[g_ptx_kernel_count]);
+      StatDisp ( g_inst_classification_stat[g_ptx_kernel_count]);
+      StatDisp ( g_inst_mem_classification_stat[g_ptx_kernel_count]);
       StatDisp ( g_inst_op_classification_stat[g_ptx_kernel_count]);
    }
 
diff --git a/src/cuda-sim/cuda-sim.h b/src/cuda-sim/cuda-sim.h
index 958daba..ef9549f 100644
--- a/src/cuda-sim/cuda-sim.h
+++ b/src/cuda-sim/cuda-sim.h
@@ -44,8 +44,10 @@ extern int g_ptx_sim_mode;
 extern int g_debug_execution;
 extern int g_debug_thread_uid;
 extern void ** g_inst_classification_stat;
+extern void ** g_inst_mem_classification_stat;
 extern void ** g_inst_op_classification_stat;
 extern int g_ptx_kernel_count; // used for classification stat collection purposes 
+extern int g_ptx_kernel_count_prev; // used for classification stat collection purposes 
 
 void ptx_opcocde_latency_options (option_parser_t opp);
 extern class kernel_info_t *gpgpu_opencl_ptx_sim_init_grid(class function_info *entry,
diff --git a/src/cuda-sim/opcodes.def b/src/cuda-sim/opcodes.def
index e1b1422..ccf64d8 100644
--- a/src/cuda-sim/opcodes.def
+++ b/src/cuda-sim/opcodes.def
@@ -35,7 +35,9 @@ SFU 4
 Mem(except Tex) 5
 Tex 6
 Nop 7
+Breakpoint 9
 Other 10
+Scalar video 11
 */
 OP_DEF(ABS_OP,abs_impl,"abs",1,1)
 OP_DEF(ADD_OP,add_impl,"add",1,1)
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 17f1714..121e079 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -445,7 +445,7 @@ void gpgpu_sim_config::reg_options(option_parser_t opp)
                 "1");
    option_parser_register(opp, "-gpgpu_ptx_instruction_classification", OPT_INT32, 
                &gpgpu_ptx_instruction_classification, 
-               "if enabled will classify ptx instruction types per kernel (Max 255 kernels now)", 
+               "if enabled will classify ptx instruction types per kernel (Max 1024 kernels now)", 
                "0");
    option_parser_register(opp, "-gpgpu_ptx_sim_mode", OPT_INT32, &g_ptx_sim_mode, 
                "Select between Performance (default) or Functional simulation (1)", 
@@ -1076,8 +1076,9 @@ void gpgpu_sim::gpu_print_stat()
       insn_warp_occ_print(stdout);
    }
    if ( gpgpu_ptx_instruction_classification ) {
-      StatDisp( g_inst_classification_stat[g_ptx_kernel_count]);
-      StatDisp( g_inst_op_classification_stat[g_ptx_kernel_count]);
+      StatDisp( g_inst_classification_stat[g_ptx_kernel_count_prev]);
+      StatDisp( g_inst_mem_classification_stat[g_ptx_kernel_count_prev]);
+      StatDisp( g_inst_op_classification_stat[g_ptx_kernel_count_prev]);
    }
 
 #ifdef GPGPUSIM_POWER_MODEL