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authorDavit Grigoryan <[email protected]>2026-04-19 03:35:21 +0000
committerDavit Grigoryan <[email protected]>2026-04-19 03:35:21 +0000
commit41d57f85442b53f3ce9d8f81a44e1ec4296e6f41 (patch)
treebfa839c1b6fe7f53467fcad4cf248cb0ce8a2dde /src
parent966b202df2441204386bad4d8bcd2c1d47aedd36 (diff)
add option for dbg prints
Diffstat (limited to 'src')
-rw-r--r--src/abstract_hardware_model.h2
-rw-r--r--src/gpgpu-sim/gpu-sim.cc8
-rw-r--r--src/gpgpu-sim/shader.cc70
-rw-r--r--src/gpgpu-sim/shader.h1
4 files changed, 50 insertions, 31 deletions
diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h
index 3f7eac3..698c896 100644
--- a/src/abstract_hardware_model.h
+++ b/src/abstract_hardware_model.h
@@ -1404,7 +1404,7 @@ class checkpoint {
unsigned radnom;
};
// Debug print macro for ITS (disabled by default)
-#define AWARE_DEBUG_PRINT 1
+#define AWARE_DEBUG_PRINT 0
#define AWARE_DPRINTF(...) \
if (AWARE_DEBUG_PRINT) { \
printf(__VA_ARGS__); \
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 7b947fb..cd38857 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -703,6 +703,14 @@ void shader_core_config::reg_options(class OptionParser *opp) {
"2=inter-first (matches pre-Change-4 behavior), 3=fewest-lanes, "
"4=same-PC (default 2).",
"2");
+ option_parser_register(
+ opp, "-gpgpu_simd_partitioning_debug", OPT_BOOL,
+ &gpgpu_simd_partitioning_debug,
+ "Enable per-cycle `SIMD_SETS:` printf spam from the co-issue "
+ "scheduler (default off). Aggregate counts are always available in "
+ "the `gpu_tot_inter_warp_coissue` / `gpu_tot_intra_warp_coissue` "
+ "stats; only turn this on for quick_tests that grep the raw lines.",
+ "0");
for (unsigned j = 0; j < SPECIALIZED_UNIT_NUM; ++j) {
std::stringstream ss;
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index 921fa60..d433b6a 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -1747,13 +1747,15 @@ void scheduler_unit::try_inter_warp_coissue(
continue;
}
- printf(
- "SIMD_SETS: cycle %llu, core %u, sched %u: warp %u "
- "CO-ISSUED with primary warp %u (%u sets)\n",
- m_shader->get_gpu()->gpu_sim_cycle +
- m_shader->get_gpu()->gpu_tot_sim_cycle,
- get_sid(), m_id, cand_warp_id, co_issue_primary_warp_id,
- cand_sets_needed);
+ if (m_shader->m_config->gpgpu_simd_partitioning_debug) {
+ printf(
+ "SIMD_SETS: cycle %llu, core %u, sched %u: warp %u "
+ "CO-ISSUED with primary warp %u (%u sets)\n",
+ m_shader->get_gpu()->gpu_sim_cycle +
+ m_shader->get_gpu()->gpu_tot_sim_cycle,
+ get_sid(), m_id, cand_warp_id, co_issue_primary_warp_id,
+ cand_sets_needed);
+ }
m_shader->co_issue_warp(co_issue_composite, cand_inst, cand_mask,
cand_warp_id, m_id, next_free_set);
@@ -1824,12 +1826,14 @@ void scheduler_unit::try_intra_warp_coissue(
continue;
}
- printf(
- "SIMD_SETS: cycle %llu, core %u, sched %u: INTRA-WARP warp %u "
- "split %u CO-ISSUED with primary split (%u sets)\n",
- m_shader->get_gpu()->gpu_sim_cycle +
- m_shader->get_gpu()->gpu_tot_sim_cycle,
- get_sid(), m_id, primary_warp_id, sec_split_id, sec_sets_needed);
+ if (m_shader->m_config->gpgpu_simd_partitioning_debug) {
+ printf(
+ "SIMD_SETS: cycle %llu, core %u, sched %u: INTRA-WARP warp %u "
+ "split %u CO-ISSUED with primary split (%u sets)\n",
+ m_shader->get_gpu()->gpu_sim_cycle +
+ m_shader->get_gpu()->gpu_tot_sim_cycle,
+ get_sid(), m_id, primary_warp_id, sec_split_id, sec_sets_needed);
+ }
m_shader->co_issue_warp(co_issue_composite, sec_inst, sec_mask,
primary_warp_id, m_id, next_free_set,
@@ -2007,12 +2011,14 @@ void scheduler_unit::try_utilization_max_coissue(
}
if (c.is_intra) {
- printf(
- "SIMD_SETS: cycle %llu, core %u, sched %u: INTRA-WARP warp %u "
- "split %u CO-ISSUED with primary split (%u sets)\n",
- m_shader->get_gpu()->gpu_sim_cycle +
- m_shader->get_gpu()->gpu_tot_sim_cycle,
- get_sid(), m_id, c.warp_id, c.split_id, needed);
+ if (m_shader->m_config->gpgpu_simd_partitioning_debug) {
+ printf(
+ "SIMD_SETS: cycle %llu, core %u, sched %u: INTRA-WARP warp %u "
+ "split %u CO-ISSUED with primary split (%u sets)\n",
+ m_shader->get_gpu()->gpu_sim_cycle +
+ m_shader->get_gpu()->gpu_tot_sim_cycle,
+ get_sid(), m_id, c.warp_id, c.split_id, needed);
+ }
m_shader->co_issue_warp(co_issue_composite, c.inst, c.mask, c.warp_id,
m_id, next_free_set, c.split_id);
@@ -2036,12 +2042,14 @@ void scheduler_unit::try_utilization_max_coissue(
}
}
} else {
- printf(
- "SIMD_SETS: cycle %llu, core %u, sched %u: warp %u "
- "CO-ISSUED with primary warp %u (%u sets)\n",
- m_shader->get_gpu()->gpu_sim_cycle +
- m_shader->get_gpu()->gpu_tot_sim_cycle,
- get_sid(), m_id, c.warp_id, co_issue_primary_warp_id, needed);
+ if (m_shader->m_config->gpgpu_simd_partitioning_debug) {
+ printf(
+ "SIMD_SETS: cycle %llu, core %u, sched %u: warp %u "
+ "CO-ISSUED with primary warp %u (%u sets)\n",
+ m_shader->get_gpu()->gpu_sim_cycle +
+ m_shader->get_gpu()->gpu_tot_sim_cycle,
+ get_sid(), m_id, c.warp_id, co_issue_primary_warp_id, needed);
+ }
m_shader->co_issue_warp(co_issue_composite, c.inst, c.mask, c.warp_id,
m_id, next_free_set);
@@ -2412,11 +2420,13 @@ void scheduler_unit::cycle() {
}
if (available_sets > 0) {
- printf("SIMD_SETS: cycle %llu, core %u, sched %u: %u sets available "
- "after primary warp %u\n",
- m_shader->get_gpu()->gpu_sim_cycle +
- m_shader->get_gpu()->gpu_tot_sim_cycle,
- get_sid(), m_id, available_sets, co_issue_primary_warp_id);
+ if (m_shader->m_config->gpgpu_simd_partitioning_debug) {
+ printf("SIMD_SETS: cycle %llu, core %u, sched %u: %u sets available "
+ "after primary warp %u\n",
+ m_shader->get_gpu()->gpu_sim_cycle +
+ m_shader->get_gpu()->gpu_tot_sim_cycle,
+ get_sid(), m_id, available_sets, co_issue_primary_warp_id);
+ }
switch (m_shader->m_config->gpgpu_co_issue_priority) {
case 0: // greedy (utilization-max, unified pool)
diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h
index 70de529..42d807c 100644
--- a/src/gpgpu-sim/shader.h
+++ b/src/gpgpu-sim/shader.h
@@ -1960,6 +1960,7 @@ class shader_core_config : public core_config {
unsigned gpgpu_compaction_mode; // 0=none, 1=xor-static, 2=full
unsigned gpgpu_opndcoll_read_latency; // extra cycles to collector
unsigned gpgpu_co_issue_priority; // 0=greedy..4=same-PC
+ bool gpgpu_simd_partitioning_debug; // verbose SIMD_SETS printf gate
unsigned n_simt_cores_per_cluster;
unsigned n_simt_clusters;