integrate wilson's bug fix for cycle counting

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7257]

4 files changed, 29 insertions, 41 deletions

diff --git a/src/cuda-sim/ptx-stats.cc b/src/cuda-sim/ptx-stats.cc
index df95960..567c62b 100644
--- a/src/cuda-sim/ptx-stats.cc
+++ b/src/cuda-sim/ptx-stats.cc
@@ -65,7 +65,7 @@
 #include "../option_parser.h"
 #include <stdio.h>
 #include <map>
-#include <unordered_map>
+#include "../tr1_hash_map.h"
 
 // external dependencies
 extern function_info *g_func_info;
@@ -147,7 +147,12 @@ public:
     unsigned long long warp_divergence; // number of warp divergence occured at this instruction
 };
 
-typedef std::unordered_map<ptx_file_line, ptx_file_line_stats, hash_ptx_file_line> ptx_file_line_stats_map_t;
+#if (tr1_hash_map_ismap == 1)
+typedef tr1_hash_map<ptx_file_line, ptx_file_line_stats> ptx_file_line_stats_map_t;
+#else
+typedef tr1_hash_map<ptx_file_line, ptx_file_line_stats, hash_ptx_file_line> ptx_file_line_stats_map_t;
+#endif
+
 static ptx_file_line_stats_map_t ptx_file_line_stats_tracker;
 
 // output statistics to a file
diff --git a/src/cuda-sim/ptx_sim.h b/src/cuda-sim/ptx_sim.h
index e9270be..d712275 100644
--- a/src/cuda-sim/ptx_sim.h
+++ b/src/cuda-sim/ptx_sim.h
@@ -69,6 +69,7 @@
 
 #include "dram_callback.h"
 #include "../abstract_hardware_model.h"
+#include "../tr1_hash_map.h" 
 
 
 struct gpgpu_ptx_sim_arg {
@@ -94,7 +95,6 @@ struct gpgpu_ptx_sim_kernel_info {
 #include <map>
 #include <set>
 #include <list>
-#include <unordered_map>
 
 #include "memory.h"
 
@@ -464,7 +464,7 @@ private:
    std::list<stack_entry> m_callstack;
    unsigned m_local_mem_stack_pointer;
 
-   typedef std::unordered_map<const symbol*,ptx_reg_t> reg_map_t;
+   typedef tr1_hash_map<const symbol*,ptx_reg_t> reg_map_t;
    std::list<reg_map_t> m_regs;
 
    bool m_enable_debug_trace;
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index 057e374..28861bf 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -2988,21 +2988,13 @@ void shader_writeback( shader_core_ctx_t *shader, unsigned int shader_number, in
    }
 
    //check mshrs for commit;
-   //in future do req bank checking here;
    unsigned mshr_threads_unlocked = 0;
    for (unsigned i = 0; i < gpu_n_max_mshr_writeback; i++) {
       mshr_head = shader->mshr_unit->return_head();
       if (mshr_head) {
-         //bail if we can't unlock anymore threads, needs to be implemented better.
-         if (mshr_threads_unlocked + mshr_head->insts.size() > (unsigned) pipe_simd_width) break;//todo, do this right
-         assert(!gpgpu_strict_simd_wrbk);//implementation commented out below 
-/*
-         //for stalling in the middle of an mshr writeback due to mshr having threads from multiple warps, does this happen anymore?
-         static unsigned next_mshr_index = 0;
-         int  mshr_warpid = -1; 
-         bool mshr_not_blocked_by_samewarp = true;
-         //use below: for (j = next_mshr_index; ...
-*/
+         //bail if we can't unlock anymore threads
+         if (mshr_threads_unlocked + mshr_head->insts.size() > (unsigned) pipe_simd_width) break;
+         assert(!gpgpu_strict_simd_wrbk);//implementation removed
          assert (mshr_head->insts.size());
          for (unsigned j = 0; j < mshr_head->insts.size(); j++) {
             inst_t &insn = mshr_head->insts[j];
@@ -3014,31 +3006,8 @@ void shader_writeback( shader_core_ctx_t *shader, unsigned int shader_number, in
             shader->pending_mem_access--;
             // for ensuring that we don't unlock more than the code allows, needs to be fixed.
             mshr_threads_unlocked++;
-/*
-            next_mshr_index++;
-            if ((shader->model == POST_DOMINATOR || shader->model == NO_RECONVERGE) && gpgpu_strict_simd_wrbk) {
-               // restricting the threads from mshr to be in the same warp
-               if (mshr_warpid == -1) {
-                  mshr_warpid = mshr_head->insts[j].hw_thread_id / warp_size;
-               } else if ((unsigned)mshr_warpid != (mshr_head->insts[j].hw_thread_id / warp_size)) {
-                  warp_conflict_at_writeback++;
-                  mshr_not_blocked_by_samewarp = false;
-                  break;
-               }
-            }
-*/
          }
-         //done with it since garanteed to wb
-/*
-         if (mshr_not_blocked_by_samewarp) {
-*/
-         //this mshr is done this cycle, can pop it
          shader->mshr_unit->pop_return_head();
-/*
-            //reset for next mshr
-            next_mshr_index = 0;
-         }
-*/
          writeback_by_MSHR = true;
          unlock_lat_info = mshr_lat_info; 
          if (w2rf) {
@@ -3571,15 +3540,26 @@ void shader_print_accstats( FILE* fout )
    fprintf(fout, "gpgpu_stall_shd_mem[t_mem][mshr_rc] = %d\n", gpu_stall_shd_mem_breakdown[T_MEM][MSHR_RC_FAIL]);
    fprintf(fout, "gpgpu_stall_shd_mem[t_mem][icnt_rc] = %d\n", gpu_stall_shd_mem_breakdown[T_MEM][ICNT_RC_FAIL]);
    fprintf(fout, "gpgpu_stall_shd_mem[s_mem][bk_conf] = %d\n", gpu_stall_shd_mem_breakdown[S_MEM][BK_CONF]);
-   fprintf(fout, "gpgpu_stall_shd_mem[g_mem][coal_stall] = %d\n", gpu_stall_shd_mem_breakdown[G_MEM_LD][COAL_STALL]);
+   fprintf(fout, "gpgpu_stall_shd_mem[gl_mem][bk_conf] = %d\n", 
+           gpu_stall_shd_mem_breakdown[G_MEM_LD][BK_CONF] + 
+           gpu_stall_shd_mem_breakdown[G_MEM_ST][BK_CONF] + 
+           gpu_stall_shd_mem_breakdown[L_MEM_LD][BK_CONF] + 
+           gpu_stall_shd_mem_breakdown[L_MEM_ST][BK_CONF]   
+           ); // coalescing stall at data cache 
+   fprintf(fout, "gpgpu_stall_shd_mem[gl_mem][coal_stall] = %d\n", 
+           gpu_stall_shd_mem_breakdown[G_MEM_LD][COAL_STALL] + 
+           gpu_stall_shd_mem_breakdown[G_MEM_ST][COAL_STALL] + 
+           gpu_stall_shd_mem_breakdown[L_MEM_LD][COAL_STALL] + 
+           gpu_stall_shd_mem_breakdown[L_MEM_ST][COAL_STALL]    
+           ); // coalescing stall + bank conflict at data cache 
    fprintf(fout, "gpgpu_stall_shd_mem[g_mem_ld][mshr_rc] = %d\n", gpu_stall_shd_mem_breakdown[G_MEM_LD][MSHR_RC_FAIL]);
    fprintf(fout, "gpgpu_stall_shd_mem[g_mem_ld][icnt_rc] = %d\n", gpu_stall_shd_mem_breakdown[G_MEM_LD][ICNT_RC_FAIL]);
    fprintf(fout, "gpgpu_stall_shd_mem[g_mem_ld][wb_icnt_rc] = %d\n", gpu_stall_shd_mem_breakdown[G_MEM_LD][WB_ICNT_RC_FAIL]);
    fprintf(fout, "gpgpu_stall_shd_mem[g_mem_ld][wb_rsrv_fail] = %d\n", gpu_stall_shd_mem_breakdown[G_MEM_LD][WB_CACHE_RSRV_FAIL]);
    fprintf(fout, "gpgpu_stall_shd_mem[g_mem_st][mshr_rc] = %d\n", gpu_stall_shd_mem_breakdown[G_MEM_ST][MSHR_RC_FAIL]);
    fprintf(fout, "gpgpu_stall_shd_mem[g_mem_st][icnt_rc] = %d\n", gpu_stall_shd_mem_breakdown[G_MEM_ST][ICNT_RC_FAIL]);
-   fprintf(fout, "gpgpu_stall_shd_mem[g_mem_st][wb_icnt_rc] = %d\n", gpu_stall_shd_mem_breakdown[G_MEM_LD][WB_ICNT_RC_FAIL]);
-   fprintf(fout, "gpgpu_stall_shd_mem[g_mem_st][wb_rsrv_fail] = %d\n", gpu_stall_shd_mem_breakdown[G_MEM_LD][WB_CACHE_RSRV_FAIL]);
+   fprintf(fout, "gpgpu_stall_shd_mem[g_mem_st][wb_icnt_rc] = %d\n", gpu_stall_shd_mem_breakdown[G_MEM_ST][WB_ICNT_RC_FAIL]);
+   fprintf(fout, "gpgpu_stall_shd_mem[g_mem_st][wb_rsrv_fail] = %d\n", gpu_stall_shd_mem_breakdown[G_MEM_ST][WB_CACHE_RSRV_FAIL]);
    fprintf(fout, "gpgpu_stall_shd_mem[l_mem_ld][mshr_rc] = %d\n", gpu_stall_shd_mem_breakdown[L_MEM_LD][MSHR_RC_FAIL]);
    fprintf(fout, "gpgpu_stall_shd_mem[l_mem_ld][icnt_rc] = %d\n", gpu_stall_shd_mem_breakdown[L_MEM_LD][ICNT_RC_FAIL]);
    fprintf(fout, "gpgpu_stall_shd_mem[l_mem_ld][wb_icnt_rc] = %d\n", gpu_stall_shd_mem_breakdown[L_MEM_LD][WB_ICNT_RC_FAIL]);
diff --git a/src/tr1_hash_map.h b/src/tr1_hash_map.h
index 3f31576..1ff7c8e 100644
--- a/src/tr1_hash_map.h
+++ b/src/tr1_hash_map.h
@@ -6,13 +6,16 @@
    #if __GNUC__ >= 4 && __GNUC_MINOR__ >= 3
       #include <unordered_map>
       #define tr1_hash_map std::unordered_map
+      #define tr1_hash_map_ismap 0
    #else
       #include <map>
       #define tr1_hash_map std::map
+      #define tr1_hash_map_ismap 1
    #endif
    #else
       #include <map>
       #define tr1_hash_map std::map
+      #define tr1_hash_map_ismap 1
    #endif
 #endif