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authorMahmoud <[email protected]>2019-09-12 18:30:18 -0400
committerMahmoud <[email protected]>2019-09-12 18:30:18 -0400
commit5753f2236b73be3e2a1a49a55fc5c52310eba622 (patch)
treec30d62bb70f62a7930f4fa0763c219b103b622d3 /src
parent6ce5e06d2389cad5041b495d5516b503ec7d2cd2 (diff)
parentbea40c4a22a86fddbf1f7845265697716727f8b1 (diff)
Merge branch 'dev' of https://github.com/purdue-aalp/gpgpu-sim_distribution into dev-traces
Diffstat (limited to 'src')
-rw-r--r--src/abstract_hardware_model.cc8
-rw-r--r--src/abstract_hardware_model.h50
-rw-r--r--src/cuda-sim/cuda-sim.cc48
-rw-r--r--src/cuda-sim/cuda_device_runtime.cc3
-rw-r--r--src/cuda-sim/half.h6
-rw-r--r--src/cuda-sim/instructions.cc76
-rw-r--r--src/cuda-sim/ptx_ir.cc2
-rw-r--r--src/cuda-sim/ptx_loader.cc3
-rw-r--r--src/cuda-sim/ptx_parser.cc2
-rw-r--r--src/gpgpu-sim/addrdec.cc2
-rw-r--r--src/gpgpu-sim/addrdec.h2
-rw-r--r--src/gpgpu-sim/dram.cc9
-rw-r--r--src/gpgpu-sim/gpu-cache.cc6
-rw-r--r--src/gpgpu-sim/gpu-sim.cc18
-rw-r--r--src/gpgpu-sim/gpu-sim.h4
-rw-r--r--src/gpgpu-sim/l2cache.cc6
-rw-r--r--src/gpgpu-sim/local_interconnect.cc2
-rw-r--r--src/gpgpu-sim/scoreboard.cc4
-rw-r--r--src/gpgpu-sim/shader.cc14
-rw-r--r--src/gpgpu-sim/shader.h6
-rw-r--r--src/gpgpusim_entrypoint.cc182
-rw-r--r--src/gpgpusim_entrypoint.h10
-rw-r--r--src/trace-driven/gpgpusim_trace_driven_main.cc4
23 files changed, 213 insertions, 254 deletions
diff --git a/src/abstract_hardware_model.cc b/src/abstract_hardware_model.cc
index 9aa1d73..e8e4b51 100644
--- a/src/abstract_hardware_model.cc
+++ b/src/abstract_hardware_model.cc
@@ -808,14 +808,14 @@ void kernel_info_t::notify_parent_finished() {
if(m_parent_kernel) {
m_kernel_entry->gpgpu_ctx->device_runtime->g_total_param_size -= ((m_kernel_entry->get_args_aligned_size() + 255)/256*256);
m_parent_kernel->remove_child(this);
- g_stream_manager()->register_finished_kernel(m_parent_kernel->get_uid());
+ m_kernel_entry->gpgpu_ctx->the_gpgpusim->g_stream_manager->register_finished_kernel(m_parent_kernel->get_uid());
}
}
CUstream_st * kernel_info_t::create_stream_cta(dim3 ctaid) {
assert(get_default_stream_cta(ctaid));
CUstream_st * stream = new CUstream_st();
- g_stream_manager()->add_stream(stream);
+ m_kernel_entry->gpgpu_ctx->the_gpgpusim->g_stream_manager->add_stream(stream);
assert(m_cta_streams.find(ctaid) != m_cta_streams.end());
assert(m_cta_streams[ctaid].size() >= 1); //must have default stream
m_cta_streams[ctaid].push_back(stream);
@@ -831,7 +831,7 @@ CUstream_st * kernel_info_t::get_default_stream_cta(dim3 ctaid) {
else {
m_cta_streams[ctaid] = std::list<CUstream_st *>();
CUstream_st * stream = new CUstream_st();
- g_stream_manager()->add_stream(stream);
+ m_kernel_entry->gpgpu_ctx->the_gpgpusim->g_stream_manager->add_stream(stream);
m_cta_streams[ctaid].push_back(stream);
return stream;
}
@@ -863,7 +863,7 @@ void kernel_info_t::destroy_cta_streams() {
for(auto s = m_cta_streams.begin(); s != m_cta_streams.end(); s++) {
stream_size += s->second.size();
for(auto ss = s->second.begin(); ss != s->second.end(); ss++)
- g_stream_manager()->destroy_stream(*ss);
+ m_kernel_entry->gpgpu_ctx->the_gpgpusim->g_stream_manager->destroy_stream(*ss);
s->second.clear();
}
printf("size %lu\n", stream_size);
diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h
index 60f7f68..341e44c 100644
--- a/src/abstract_hardware_model.h
+++ b/src/abstract_hardware_model.h
@@ -447,19 +447,25 @@ protected:
class gpgpu_sim * m_gpu;
};
-#define GLOBAL_HEAP_START 0xC0000000
- // start allocating from this address (lower values used for allocating globals in .ptx file)
-#define SHARED_MEM_SIZE_MAX (96*1024)
-#define LOCAL_MEM_SIZE_MAX (16*1024)
-#define MAX_STREAMING_MULTIPROCESSORS 80 //scale it to Volta
-#define MAX_THREAD_PER_SM 2048
-#define MAX_WARP_PER_SM 64
-#define TOTAL_LOCAL_MEM_PER_SM (MAX_THREAD_PER_SM*LOCAL_MEM_SIZE_MAX)
-#define TOTAL_SHARED_MEM (MAX_STREAMING_MULTIPROCESSORS*SHARED_MEM_SIZE_MAX)
-#define TOTAL_LOCAL_MEM (MAX_STREAMING_MULTIPROCESSORS*MAX_THREAD_PER_SM*LOCAL_MEM_SIZE_MAX)
-#define SHARED_GENERIC_START (GLOBAL_HEAP_START-TOTAL_SHARED_MEM)
-#define LOCAL_GENERIC_START (SHARED_GENERIC_START-TOTAL_LOCAL_MEM)
-#define STATIC_ALLOC_LIMIT (GLOBAL_HEAP_START - (TOTAL_LOCAL_MEM+TOTAL_SHARED_MEM))
+// Let's just upgrade to C++11 so we can use constexpr here...
+// start allocating from this address (lower values used for allocating globals in .ptx file)
+const unsigned long long GLOBAL_HEAP_START = 0xC0000000;
+// Volta max shmem size is 96kB
+const unsigned long long SHARED_MEM_SIZE_MAX = 96 * (1 << 10);
+// Volta max local mem is 16kB
+const unsigned long long LOCAL_MEM_SIZE_MAX = 1 << 14;
+// Volta Titan V has 80 SMs
+const unsigned MAX_STREAMING_MULTIPROCESSORS = 80;
+// Max 2048 threads / SM
+const unsigned MAX_THREAD_PER_SM = 1 << 11;
+// MAX 64 warps / SM
+const unsigned MAX_WARP_PER_SM = 1 << 6;
+const unsigned long long TOTAL_LOCAL_MEM_PER_SM = MAX_THREAD_PER_SM * LOCAL_MEM_SIZE_MAX;
+const unsigned long long TOTAL_SHARED_MEM = MAX_STREAMING_MULTIPROCESSORS * SHARED_MEM_SIZE_MAX;
+const unsigned long long TOTAL_LOCAL_MEM = MAX_STREAMING_MULTIPROCESSORS * MAX_THREAD_PER_SM * LOCAL_MEM_SIZE_MAX;
+const unsigned long long SHARED_GENERIC_START = GLOBAL_HEAP_START - TOTAL_SHARED_MEM;
+const unsigned long long LOCAL_GENERIC_START = SHARED_GENERIC_START - TOTAL_LOCAL_MEM;
+const unsigned long long STATIC_ALLOC_LIMIT = GLOBAL_HEAP_START - (TOTAL_LOCAL_MEM + TOTAL_SHARED_MEM);
#if !defined(__CUDA_RUNTIME_API_H__)
@@ -525,10 +531,10 @@ private:
int checkpoint_option;
int checkpoint_kernel;
int checkpoint_CTA;
- int resume_option;
- int resume_kernel;
- int resume_CTA;
- int checkpoint_CTA_t;
+ unsigned resume_option;
+ unsigned resume_kernel;
+ unsigned resume_CTA;
+ unsigned checkpoint_CTA_t;
int checkpoint_insn_Y;
int g_ptx_inst_debug_to_file;
char* g_ptx_inst_debug_file;
@@ -546,10 +552,10 @@ public:
int checkpoint_option;
int checkpoint_kernel;
int checkpoint_CTA;
- int resume_option;
- int resume_kernel;
- int resume_CTA;
- int checkpoint_CTA_t;
+ unsigned resume_option;
+ unsigned resume_kernel;
+ unsigned resume_CTA;
+ unsigned checkpoint_CTA_t;
int checkpoint_insn_Y;
//Move some cycle core stats here instead of being global
@@ -998,7 +1004,7 @@ public:
printf("Printing mem access generated\n");
std::list<mem_access_t>::iterator it;
for (it = m_accessq.begin(); it != m_accessq.end(); ++it){
- printf("MEM_TXN_GEN:%s:%x, Size:%d \n",mem_access_type_str(it->get_type()), it->get_addr(),it->get_size());
+ printf("MEM_TXN_GEN:%s:%llx, Size:%d \n",mem_access_type_str(it->get_type()), it->get_addr(),it->get_size());
}
}
}
diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc
index 1b0e841..7a130ea 100644
--- a/src/cuda-sim/cuda-sim.cc
+++ b/src/cuda-sim/cuda-sim.cc
@@ -429,7 +429,7 @@ void gpgpu_t::memcpy_to_gpu( size_t dst_start_addr, const void *src, size_t coun
// Copy into the performance model.
//extern gpgpu_sim* g_the_gpu;
- g_the_gpu()->perf_memcpy_to_gpu(dst_start_addr, count);
+ gpgpu_ctx->the_gpgpusim->g_the_gpu->perf_memcpy_to_gpu(dst_start_addr, count);
if(g_debug_execution >= 3) {
printf( " done.\n");
fflush(stdout);
@@ -448,7 +448,7 @@ void gpgpu_t::memcpy_from_gpu( void *dst, size_t src_start_addr, size_t count )
// Copy into the performance model.
//extern gpgpu_sim* g_the_gpu;
- g_the_gpu()->perf_memcpy_to_gpu(src_start_addr, count);
+ gpgpu_ctx->the_gpgpusim->g_the_gpu->perf_memcpy_to_gpu(src_start_addr, count);
if(g_debug_execution >= 3) {
printf( " done.\n");
fflush(stdout);
@@ -1254,7 +1254,7 @@ void function_info::param_to_shared( memory_space *shared_mem, symbol_table *sym
{
// TODO: call this only for PTXPlus with GT200 models
//extern gpgpu_sim* g_the_gpu;
- if (not g_the_gpu()->get_config().convert_to_ptxplus()) return;
+ if (not gpgpu_ctx->the_gpgpusim->g_the_gpu->get_config().convert_to_ptxplus()) return;
// copies parameters into simulated shared memory
for( std::map<unsigned,param_info>::iterator i=m_ptx_kernel_param_info.begin(); i!=m_ptx_kernel_param_info.end(); i++ ) {
@@ -1309,7 +1309,7 @@ void function_info::ptx_jit_config(std::map<unsigned long long, size_t> mallocPt
char buff[1024];
std::string filename_c(filename+"_c");
snprintf(buff,1024,"c++filt %s > %s", get_name().c_str(), filename_c.c_str());
- system(buff);
+ assert(system(buff) != NULL);
FILE *fp = fopen(filename_c.c_str(), "r");
fgets(buff, 1024, fp);
fclose(fp);
@@ -1432,13 +1432,13 @@ void function_info::ptx_jit_config(std::map<unsigned long long, size_t> mallocPt
fout = fopen(ptx_config_fn.c_str(), "a");
assert(fout!=NULL);
for (unsigned i = 0; i<line_number; i++){
- fgets(buff, 1024, fin);
+ assert(fgets(buff, 1024, fin) != NULL);
assert(!feof(fin));
}
fprintf(fout, "\n\n");
do{
fprintf(fout, "%s", buff);
- fgets(buff, 1024, fin);
+ assert(fgets(buff, 1024, fin) != NULL);
if(feof(fin)){
break;
}
@@ -1491,7 +1491,6 @@ static unsigned get_tex_datasize( const ptx_instruction *pI, ptx_thread_info *th
const operand_info &src1 = pI->src1(); //the name of the texture
std::string texname = src1.name();
- gpgpu_t *gpu = thread->get_gpu();
/*
For programs with many streams, textures can be bound and unbound
asynchronously. This means we need to use the kernel's "snapshot" of
@@ -1577,7 +1576,7 @@ void ptx_thread_info::ptx_exec_inst( warp_inst_t &inst, unsigned lane_id)
}
//Tensorcore is warp synchronous operation. So these instructions needs to be executed only once. To make the simulation faster removing the redundant tensorcore operation
- if(!tensorcore_op(inst_opcode)||(tensorcore_op(inst_opcode))&&(lane_id==0)){
+ if(!tensorcore_op(inst_opcode)||((tensorcore_op(inst_opcode))&&(lane_id==0))){
switch ( inst_opcode ) {
#define OP_DEF(OP,FUNC,STR,DST,CLASSIFICATION) case OP: FUNC(pI,this); op_classification = CLASSIFICATION; break;
#define OP_W_DEF(OP,FUNC,STR,DST,CLASSIFICATION) case OP: FUNC(pI,get_core(),inst); op_classification = CLASSIFICATION; break;
@@ -2138,19 +2137,13 @@ void cuda_sim::gpgpu_cuda_ptx_sim_main_func( kernel_info_t &kernel, bool openCL
kernel_func_info->set_pdom();
}
- unsigned max_cta_tot = max_cta(kernel_info,kernel.threads_per_cta(), g_the_gpu()->getShaderCoreConfig()->warp_size, g_the_gpu()->getShaderCoreConfig()->n_thread_per_shader, g_the_gpu()->getShaderCoreConfig()->gpgpu_shmem_size, g_the_gpu()->getShaderCoreConfig()->gpgpu_shader_registers, g_the_gpu()->getShaderCoreConfig()->max_cta_per_core);
+ unsigned max_cta_tot = max_cta(kernel_info,kernel.threads_per_cta(), gpgpu_ctx->the_gpgpusim->g_the_gpu->getShaderCoreConfig()->warp_size, gpgpu_ctx->the_gpgpusim->g_the_gpu->getShaderCoreConfig()->n_thread_per_shader, gpgpu_ctx->the_gpgpusim->g_the_gpu->getShaderCoreConfig()->gpgpu_shmem_size, gpgpu_ctx->the_gpgpusim->g_the_gpu->getShaderCoreConfig()->gpgpu_shader_registers, gpgpu_ctx->the_gpgpusim->g_the_gpu->getShaderCoreConfig()->max_cta_per_core);
printf("Max CTA : %d\n",max_cta_tot);
-
-
-
-
- int inst_count=50;
- int cp_op= g_the_gpu()->checkpoint_option;
- int cp_CTA = g_the_gpu()->checkpoint_CTA;
- int cp_kernel= g_the_gpu()->checkpoint_kernel;
- cp_count= g_the_gpu()->checkpoint_insn_Y;
- cp_cta_resume= g_the_gpu()->checkpoint_CTA_t;
+ int cp_op= gpgpu_ctx->the_gpgpusim->g_the_gpu->checkpoint_option;
+ int cp_kernel= gpgpu_ctx->the_gpgpusim->g_the_gpu->checkpoint_kernel;
+ cp_count= gpgpu_ctx->the_gpgpusim->g_the_gpu->checkpoint_insn_Y;
+ cp_cta_resume= gpgpu_ctx->the_gpgpusim->g_the_gpu->checkpoint_CTA_t;
int cta_launched =0;
//we excute the kernel one CTA (Block) at the time, as synchronization functions work block wise
@@ -2162,8 +2155,8 @@ void cuda_sim::gpgpu_cuda_ptx_sim_main_func( kernel_info_t &kernel, bool openCL
{
functionalCoreSim cta(
&kernel,
- g_the_gpu(),
- g_the_gpu()->getShaderCoreConfig()->warp_size
+ gpgpu_ctx->the_gpgpusim->g_the_gpu,
+ gpgpu_ctx->the_gpgpusim->g_the_gpu->getShaderCoreConfig()->warp_size
);
cta.execute(cp_count,temp);
@@ -2184,7 +2177,7 @@ void cuda_sim::gpgpu_cuda_ptx_sim_main_func( kernel_info_t &kernel, bool openCL
{
char f1name[2048];
snprintf(f1name,2048,"checkpoint_files/global_mem_%d.txt", kernel.get_uid() );
- g_checkpoint->store_global_mem(g_the_gpu()->get_global_memory(), f1name , "%08x");
+ g_checkpoint->store_global_mem(gpgpu_ctx->the_gpgpusim->g_the_gpu->get_global_memory(), f1name , (char *)"%08x");
}
@@ -2195,7 +2188,7 @@ void cuda_sim::gpgpu_cuda_ptx_sim_main_func( kernel_info_t &kernel, bool openCL
//openCL kernel simulation calls don't register the kernel so we don't register its exit
if(!openCL) {
//extern stream_manager *g_stream_manager;
- g_stream_manager()->register_finished_kernel(kernel.get_uid());
+ gpgpu_ctx->the_gpgpusim->g_stream_manager->register_finished_kernel(kernel.get_uid());
}
//******PRINTING*******
@@ -2210,7 +2203,7 @@ void cuda_sim::gpgpu_cuda_ptx_sim_main_func( kernel_info_t &kernel, bool openCL
//g_simulation_starttime is initilized by gpgpu_ptx_sim_init_perf() in gpgpusim_entrypoint.cc upon starting gpgpu-sim
time_t end_time, elapsed_time, days, hrs, minutes, sec;
end_time = time((time_t *)NULL);
- elapsed_time = MAX(end_time - GPGPUsim_ctx_ptr()->g_simulation_starttime, 1);
+ elapsed_time = MAX(end_time - gpgpu_ctx->the_gpgpusim->g_simulation_starttime, 1);
//calculating and printing simulation time in terms of days, hours, minutes and seconds
@@ -2312,18 +2305,15 @@ void functionalCoreSim::execute(int inst_count, unsigned ctaid_cp)
checkpoint *g_checkpoint;
g_checkpoint = new checkpoint();
- symbol * sym;
ptx_reg_t regval;
regval.u64= 123;
- symbol_table * symtab= m_kernel->entry()->get_symtab();
-
unsigned ctaid =m_kernel->get_next_cta_id_single();
if(m_gpu->checkpoint_option==1 && (m_kernel->get_uid()==m_gpu->checkpoint_kernel) && (ctaid_cp>=m_gpu->checkpoint_CTA) && (ctaid_cp<m_gpu->checkpoint_CTA_t))
{
char fname[2048];
snprintf(fname,2048,"checkpoint_files/shared_mem_%d.txt",ctaid-1 );
- g_checkpoint->store_global_mem(m_thread[0]->m_shared_mem, fname , "%08x");
+ g_checkpoint->store_global_mem(m_thread[0]->m_shared_mem, fname , (char *)"%08x");
for(int i=0; i<32*m_warp_count;i++)
{
char fname[2048];
@@ -2331,7 +2321,7 @@ void functionalCoreSim::execute(int inst_count, unsigned ctaid_cp)
m_thread[i]->print_reg_thread(fname);
char f1name[2048];
snprintf(f1name,2048,"checkpoint_files/local_mem_thread_%d_%d_reg.txt",i,ctaid-1 );
- g_checkpoint->store_global_mem(m_thread[i]->m_local_mem, f1name , "%08x");
+ g_checkpoint->store_global_mem(m_thread[i]->m_local_mem, f1name , (char *)"%08x");
m_thread[i]->set_done();
m_thread[i]->exitCore();
m_thread[i]->registerExit();
diff --git a/src/cuda-sim/cuda_device_runtime.cc b/src/cuda-sim/cuda_device_runtime.cc
index dc3adc3..4baced5 100644
--- a/src/cuda-sim/cuda_device_runtime.cc
+++ b/src/cuda-sim/cuda_device_runtime.cc
@@ -27,7 +27,6 @@
}
-//extern stream_manager *g_stream_manager();
//Handling device runtime api:
//void * cudaGetParameterBufferV2(void *func, dim3 gridDimension, dim3 blockDimension, unsigned int sharedMemSize)
@@ -285,7 +284,7 @@ void cuda_device_runtime::launch_one_device_kernel() {
device_launch_operation_t &op = g_cuda_device_launch_op.front();
stream_operation stream_op = stream_operation(op.grid, gpgpu_ctx->func_sim->g_ptx_sim_mode, op.stream);
- g_stream_manager()->push(stream_op);
+ gpgpu_ctx->the_gpgpusim->g_stream_manager->push(stream_op);
g_cuda_device_launch_op.pop_front();
}
}
diff --git a/src/cuda-sim/half.h b/src/cuda-sim/half.h
index 8f1a8eb..9f74bb7 100644
--- a/src/cuda-sim/half.h
+++ b/src/cuda-sim/half.h
@@ -642,10 +642,10 @@ namespace half_float
if(exp > 16)
{
if(R == std::round_toward_infinity)
- return hbits | 0x7C00 - (hbits>>15);
+ return hbits | (0x7C00 - (hbits>>15));
else if(R == std::round_toward_neg_infinity)
- return hbits | 0x7BFF + (hbits>>15);
- return hbits | 0x7BFF + (R!=std::round_toward_zero);
+ return hbits | (0x7BFF + (hbits>>15));
+ return hbits | (0x7BFF + (R!=std::round_toward_zero));
}
if(exp < -13)
value = std::ldexp(value, 24);
diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc
index 58a077e..014e588 100644
--- a/src/cuda-sim/instructions.cc
+++ b/src/cuda-sim/instructions.cc
@@ -203,7 +203,7 @@ void ptx_thread_info::print_reg_thread(char * fname)
const std::string &name = it->first->name();
const std::string &dec= it->first->decl_location();
unsigned size = it->first->get_size_in_bytes();
- fprintf(fp,"%s %llu %s %d\n",name.c_str(),it->second, dec.c_str(),size );
+ fprintf(fp,"%s %llu %s %d\n", name.c_str(), it->second, dec.c_str(), size);
}
//m_regs.pop_back();
@@ -224,7 +224,6 @@ void ptx_thread_info::resume_reg_thread(char * fname, symbol_table * symtab)
{
symbol *reg;
char * pch;
- unsigned size;
pch = strtok (line," ");
char * name =pch;
reg= symtab->lookup(name);
@@ -232,11 +231,7 @@ void ptx_thread_info::resume_reg_thread(char * fname, symbol_table * symtab)
pch = strtok (NULL," ");
data = atoi(pch);
pch = strtok (NULL," ");
- char * decl= pch;
pch = strtok (NULL," ");
- size = atoi(pch);
-
-
m_regs.back()[reg] = data;
}
fclose ( fp2 );
@@ -1819,9 +1814,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
ptx_reg_t matrix_d[16][16];
ptx_reg_t src_data;
ptx_thread_info *thread;
- int stride;
- unsigned wmma_type = pI->get_wmma_type();
unsigned a_layout = pI->get_wmma_layout(0);
unsigned b_layout = pI->get_wmma_layout(1);
unsigned type = pI->get_type();
@@ -1833,7 +1826,6 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
tid= inst.warp_id_func()*core->get_warp_size();
else
tid= inst.warp_id()*core->get_warp_size();
- unsigned thread_group_index;
float temp;
half temp2;
@@ -1847,9 +1839,9 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
ptx_reg_t v[8];
thread->get_vector_operand_values( src_a, v, nelem );
if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
- printf("Thread%d_Iteration=%d\n:",thrd,operand_num);
- for(k=0;k<nelem;k++){
- printf("%x ",v[k].u64);
+ printf("Thread%d_Iteration=%d\n:", thrd, operand_num);
+ for(k = 0; k < nelem; k++){
+ printf("%llx ",v[k].u64);
}
printf("\n");
}
@@ -2027,7 +2019,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
printf("thread%d:",thrd);
for(k=0;k<8;k++){
- printf("%x ",matrix_d[row_t[k]][col_t[k]].f16);
+ printf("%x ", (unsigned int)matrix_d[row_t[k]][col_t[k]].f16);
}
printf("\n");
}
@@ -2038,7 +2030,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
nw_data4.s64=((matrix_d[row_t[6]][col_t[6]].s64 & 0xffff))|((matrix_d[row_t[7]][col_t[7]].s64&0xffff)<<16);
thread->set_vector_operand_values(dst,nw_data1,nw_data2,nw_data3,nw_data4);
if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
- printf("thread%d=%x,%x,%x,%x",thrd,nw_data1.s64,nw_data2.s64,nw_data3.s64,nw_data4.s64);
+ printf("thread%d=%llx,%llx,%llx,%llx", thrd, nw_data1.s64, nw_data2.s64, nw_data3.s64, nw_data4.s64);
}
else{
@@ -2298,9 +2290,8 @@ unsigned int saturatei(unsigned int a, unsigned int max)
ptx_reg_t f2x( ptx_reg_t x, unsigned from_width, unsigned to_width, int to_sign, int rounding_mode, int saturation_mode )
{
- half mytemp;
- float myfloat;
- half_float::half tmp_h;
+ half mytemp;
+ half_float::half tmp_h;
//assert( from_width == 32);
enum cudaRoundMode mode = cudaRoundZero;
@@ -3085,7 +3076,7 @@ void mma_st_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
size_t size;
unsigned smid;
int t;
- int thrd,odd,inx,k;
+ int thrd, k;
ptx_thread_info *thread;
const operand_info &src = pI->operand_lookup(1);
@@ -3105,15 +3096,13 @@ void mma_st_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
_memory_op_t insn_memory_op = pI->has_memory_read() ? memory_load : memory_store;
for (thrd=0; thrd < core->get_warp_size(); thrd++) {
thread = core->get_thread_info()[tid+thrd];
- odd=thrd%2;
- inx=thrd/2;
- ptx_reg_t addr_reg = thread->get_operand_value(src1, src, type, thread, 1);
+ ptx_reg_t addr_reg = thread->get_operand_value(src1, src, type, thread, 1);
ptx_reg_t src2_data = thread->get_operand_value(src2, src, type, thread, 1);
const operand_info &src_a= pI->operand_lookup(1);
unsigned nelem = src_a.get_vect_nelem();
ptx_reg_t* v= new ptx_reg_t[8];
thread->get_vector_operand_values( src_a, v, nelem );
- stride=src2_data.u32;
+ stride = src2_data.u32;
memory_space_t space = pI->get_space();
@@ -3130,9 +3119,9 @@ void mma_st_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
}
decode_space(space,thread,src1,mem,addr);
- type_info_key::type_decode(type,size,t);
+ type_info_key::type_decode(type, size, t);
if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
- printf("mma_st: thrd=%d,addr=%x, fp(size=%d), stride=%d\n",thrd,addr_reg.u32,size,src2_data.u32);
+ printf("mma_st: thrd=%d, addr=%x, fp(size=%zu), stride=%d\n", thrd, addr_reg.u32, size, src2_data.u32);
addr_t new_addr = addr+thread_group_offset(thrd,wmma_type,wmma_layout,type,stride)*size/8;
addr_t push_addr;
@@ -3152,7 +3141,7 @@ void mma_st_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
mem_txn_addr[num_mem_txn++]=push_addr;
if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
- printf("wmma:store:thread%d=%x,%x,%x,%x,%x,%x,%x,%x\n",thrd,v[0].s64,v[1].s64,v[2].s64,v[3].s64,v[4].s64,v[5].s64,v[6].s64,v[7].s64);
+ printf("wmma:store:thread%d=%llx,%llx,%llx,%llx,%llx,%llx,%llx,%llx\n",thrd,v[0].s64,v[1].s64,v[2].s64,v[3].s64,v[4].s64,v[5].s64,v[6].s64,v[7].s64);
float temp;
int l;
printf("thread=%d:",thrd);
@@ -3179,7 +3168,7 @@ void mma_st_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
}
if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
- printf("wmma:store:thread%d=%x,%x,%x,%x,%x,%x,%x,%x\n",thrd,nw_v[0].s64,nw_v[1].s64,nw_v[2].s64,nw_v[3].s64,nw_v[4].s64,nw_v[5].s64,nw_v[6].s64,nw_v[7].s64);
+ printf("wmma:store:thread%d=%llx,%llx,%llx,%llx,%llx,%llx,%llx,%llx\n",thrd,nw_v[0].s64,nw_v[1].s64,nw_v[2].s64,nw_v[3].s64,nw_v[4].s64,nw_v[5].s64,nw_v[6].s64,nw_v[7].s64);
}
}
@@ -3238,11 +3227,11 @@ void mma_ld_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
}
decode_space(space,thread,src1,mem,addr);
- type_info_key::type_decode(type,size,t);
+ type_info_key::type_decode(type, size, t);
ptx_reg_t data[16];
if(core->get_gpu()->gpgpu_ctx->debug_tensorcore)
- printf("mma_ld: thrd=%d,addr=%x, fpsize=%d, stride=%d\n",thrd,src1_data.u32,size,src2_data.u32);
+ printf("mma_ld: thrd=%d,addr=%x, fpsize=%zu, stride=%d\n", thrd, src1_data.u32, size, src2_data.u32);
addr_t new_addr = addr+thread_group_offset(thrd,wmma_type,wmma_layout,type,stride)*size/8;
addr_t fetch_addr;
@@ -3341,7 +3330,7 @@ void mma_ld_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
if(type==F16_TYPE){
printf("\nmma_ld:thread%d= ",thrd);
for(i=0;i<16;i++){
- printf("%x ",data[i].u64);
+ printf("%llx ",data[i].u64);
}
printf("\n");
@@ -3361,7 +3350,7 @@ void mma_ld_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
printf("\n");
printf("\nmma_ld:thread%d= ",thrd);
for(i=0;i<8;i++){
- printf("%x ",data[i].u64);
+ printf("%llx ",data[i].u64);
}
printf("\n");
}
@@ -3388,15 +3377,15 @@ void mma_ld_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
else
thread->set_wmma_vector_operand_values(dst,nw_data[0],nw_data[1],nw_data[2],nw_data[3],nw_data[4],nw_data[5],nw_data[6],nw_data[7]);
if(core->get_gpu()->gpgpu_ctx->debug_tensorcore){
- printf("mma_ld:data[0].s64=%x,data[1].s64=%x,new_data[0].s64=%x\n",data[0].u64,data[1].u64,nw_data[0].u64);
- printf("mma_ld:data[2].s64=%x,data[3].s64=%x,new_data[1].s64=%x\n",data[2].u64,data[3].u64,nw_data[1].u64);
- printf("mma_ld:data[4].s64=%x,data[5].s64=%x,new_data[2].s64=%x\n",data[4].u64,data[5].u64,nw_data[2].u64);
- printf("mma_ld:data[6].s64=%x,data[7].s64=%x,new_data[3].s64=%x\n",data[6].u64,data[7].u64,nw_data[3].u64);
+ printf("mma_ld:data[0].s64=%llx,data[1].s64=%llx,new_data[0].s64=%llx\n",data[0].u64,data[1].u64,nw_data[0].u64);
+ printf("mma_ld:data[2].s64=%llx,data[3].s64=%llx,new_data[1].s64=%llx\n",data[2].u64,data[3].u64,nw_data[1].u64);
+ printf("mma_ld:data[4].s64=%llx,data[5].s64=%llx,new_data[2].s64=%llx\n",data[4].u64,data[5].u64,nw_data[2].u64);
+ printf("mma_ld:data[6].s64=%llx,data[7].s64=%llx,new_data[3].s64=%llx\n",data[6].u64,data[7].u64,nw_data[3].u64);
if(wmma_type!=LOAD_C){
- printf("mma_ld:data[8].s64=%x,data[9].s64=%x,new_data[4].s64=%x\n",data[8].u64,data[9].u64,nw_data[4].s64);
- printf("mma_ld:data[10].s64=%x,data[11].s64=%x,new_data[5].s64=%x\n",data[10].u64,data[11].u64,nw_data[5].u64);
- printf("mma_ld:data[12].s64=%x,data[13].s64=%x,new_data[6].s64=%x\n",data[12].u64,data[13].u64,nw_data[6].u64);
- printf("mma_ld:data[14].s64=%x,data[15].s64=%x,new_data[7].s64=%x\n",data[14].u64,data[15].u64,nw_data[3].u64);
+ printf("mma_ld:data[8].s64=%llx,data[9].s64=%llx,new_data[4].s64=%llx\n",data[8].u64,data[9].u64,nw_data[4].s64);
+ printf("mma_ld:data[10].s64=%llx,data[11].s64=%llx,new_data[5].s64=%llx\n",data[10].u64,data[11].u64,nw_data[5].u64);
+ printf("mma_ld:data[12].s64=%llx,data[13].s64=%llx,new_data[6].s64=%llx\n",data[12].u64,data[13].u64,nw_data[6].u64);
+ printf("mma_ld:data[14].s64=%llx,data[15].s64=%llx,new_data[7].s64=%llx\n",data[14].u64,data[15].u64,nw_data[3].u64);
}
}
}
@@ -4132,9 +4121,9 @@ int prmt_mode_present(int mode)
}
return returnval;
}
-int read_byte(int mode,int control,int d_sel_index,signed long long value){
+int read_byte(int mode, int control, int d_sel_index, signed long long value){
- int returnval;
+ int returnval = 0;
int prmt_f4e_mode[4][4]={{0,1,2,3},{1,2,3,4},{2,3,4,5},{3,4,5,6}};
int prmt_b4e_mode[4][4]={{0,7,6,5},{1,0,7,6},{2,1,0,7},{3,2,1,0}};
int prmt_rc8_mode[4][4]={{0,0,0,0},{1,1,1,1},{2,2,2,2},{3,3,3,3}};
@@ -4157,11 +4146,12 @@ int read_byte(int mode,int control,int d_sel_index,signed long long value){
case PRMT_RC8_MODE: returnval=prmt_rc8_mode[control][d_sel_index];break;
case PRMT_ECL_MODE: returnval=prmt_ecl_mode[control][d_sel_index];break;
case PRMT_ECR_MODE: returnval=prmt_ecr_mode[control][d_sel_index];break;
- case PRMT_RC16_MODE: returnval=prmt_rc16_mode[control][d_sel_index];break;
- default: printf("ERROR\n");break;
+ case PRMT_RC16_MODE: returnval=prmt_rc16_mode[control][d_sel_index];break;
+ // Change the default from printing "ERROR" to just asserting
+ default: assert(false);
}
}
- return (returnval<<8*d_sel_index);
+ return (returnval << 8 * d_sel_index);
}
void prmt_impl( const ptx_instruction *pI, ptx_thread_info *thread ) {
diff --git a/src/cuda-sim/ptx_ir.cc b/src/cuda-sim/ptx_ir.cc
index 6978cc1..d8943d2 100644
--- a/src/cuda-sim/ptx_ir.cc
+++ b/src/cuda-sim/ptx_ir.cc
@@ -1415,7 +1415,7 @@ unsigned function_info::print_insn( unsigned pc, FILE * fp ) const
snprintf(command,1024,"c++filt -p %s",m_name.c_str());
FILE *p = popen(command,"r");
buffer[0]=0;
- fgets(buffer, 1023, p);
+ assert(fgets(buffer, 1023, p) != NULL);
// Remove trailing "\n" in buffer
char *c;
if ((c=strchr(buffer, '\n')) != NULL) *c = '\0';
diff --git a/src/cuda-sim/ptx_loader.cc b/src/cuda-sim/ptx_loader.cc
index 207fa1f..f06fefd 100644
--- a/src/cuda-sim/ptx_loader.cc
+++ b/src/cuda-sim/ptx_loader.cc
@@ -214,7 +214,8 @@ void fix_duplicate_errors(char fname2[1024]) {
long filesize = ftell(ptxsource);
rewind(ptxsource);
char *ptxdata = (char*)malloc((filesize+1)*sizeof(char));
- fread(ptxdata, filesize, 1, ptxsource);
+ // Fail if we do not read the file
+ assert(fread(ptxdata, filesize, 1, ptxsource) == 1);
fclose(ptxsource);
FILE *ptxdest = fopen(fname2,"w");
diff --git a/src/cuda-sim/ptx_parser.cc b/src/cuda-sim/ptx_parser.cc
index 9e9d500..24af3ad 100644
--- a/src/cuda-sim/ptx_parser.cc
+++ b/src/cuda-sim/ptx_parser.cc
@@ -421,7 +421,7 @@ void ptx_recognizer::add_identifier( const char *identifier, int array_dim, unsi
assert( (num_bits%8) == 0 );
addr = g_current_symbol_table->get_sstarr_next();
addr_pad = pad_address(addr, num_bits/8, 128);
- printf("from 0x%x to 0x%lx (sstarr memory space)\n",
+ printf("from 0x%llx to 0x%llx (sstarr memory space)\n",
addr+addr_pad,
addr+addr_pad + num_bits/8);
fflush(stdout);
diff --git a/src/gpgpu-sim/addrdec.cc b/src/gpgpu-sim/addrdec.cc
index 3262456..f225933 100644
--- a/src/gpgpu-sim/addrdec.cc
+++ b/src/gpgpu-sim/addrdec.cc
@@ -184,7 +184,7 @@ void linear_to_raw_address_translation::addrdec_tlx(new_addr_type addr, addrdec_
}
assert(tlx->chip < m_n_channel);
- assert(tlx->sub_partition < m_n_channel*m_n_sub_partition_in_channel);
+ assert(tlx->sub_partition < m_n_channel * m_n_sub_partition_in_channel);
return;
break;
}
diff --git a/src/gpgpu-sim/addrdec.h b/src/gpgpu-sim/addrdec.h
index a5333fb..c9a1420 100644
--- a/src/gpgpu-sim/addrdec.h
+++ b/src/gpgpu-sim/addrdec.h
@@ -92,7 +92,7 @@ private:
new_addr_type sub_partition_id_mask;
unsigned int gap;
- int m_n_channel;
+ unsigned m_n_channel;
int m_n_sub_partition_in_channel;
};
diff --git a/src/gpgpu-sim/dram.cc b/src/gpgpu-sim/dram.cc
index d443d79..9c33822 100644
--- a/src/gpgpu-sim/dram.cc
+++ b/src/gpgpu-sim/dram.cc
@@ -482,7 +482,6 @@ void dram_t::cycle()
bool memory_pending_rw_found=false;
for (unsigned j=0;j<m_config->nbk;j++) {
- unsigned grp = get_bankgrp_number(j);
if (bk[j]->mrq && (((bk[j]->curr_row == bk[j]->mrq->row) &&
(bk[j]->mrq->rw == READ) &&
(bk[j]->state == BANK_ACTIVE))
@@ -817,10 +816,10 @@ void dram_t::visualize() const
void dram_t::print_stat( FILE* simFile )
{
- fprintf(simFile,"DRAM (%llu): n_cmd=%llu n_nop=%llu n_act=%llu n_pre=%llu n_ref=%llu n_req=%llu n_rd=%llu n_write=%llu bw_util=%.4g ",
+ fprintf(simFile,"DRAM (%u): n_cmd=%llu n_nop=%llu n_act=%llu n_pre=%llu n_ref=%llu n_req=%llu n_rd=%llu n_write=%llu bw_util=%.4g ",
id, n_cmd, n_nop, n_act, n_pre, n_ref, n_req, n_rd, n_wr,
(float)bwutil/n_cmd);
- fprintf(simFile, "mrqq: %d %.4g mrqsmax=%d ", max_mrqs, (float)ave_mrqs/n_cmd, max_mrqs_temp);
+ fprintf(simFile, "mrqq: %d %.4g mrqsmax=%llu ", max_mrqs, (float)ave_mrqs/n_cmd, max_mrqs_temp);
fprintf(simFile, "\n");
fprintf(simFile, "dram_util_bins:");
for (unsigned i=0;i<10;i++) fprintf(simFile, " %d", dram_util_bins[i]);
@@ -899,10 +898,10 @@ void dram_t::set_dram_power_stats( unsigned &cmd,
unsigned dram_t::get_bankgrp_number(unsigned i)
{
if(m_config->dram_bnkgrp_indexing_policy == HIGHER_BITS) { //higher bits
- return i>>m_config->bk_tag_length;
+ return i >> m_config->bk_tag_length;
}
else if (m_config->dram_bnkgrp_indexing_policy == LOWER_BITS) { //lower bits
- return i&((m_config->nbkgrp-1));
+ return i & ((m_config->nbkgrp - 1));
}
else {
assert(1);
diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc
index b7d0ac3..65f2f6d 100644
--- a/src/gpgpu-sim/gpu-cache.cc
+++ b/src/gpgpu-sim/gpu-cache.cc
@@ -790,7 +790,7 @@ void cache_stats::print_stats(FILE *fout, const char *cache_name) const{
}
for (unsigned type = 0; type < NUM_MEM_ACCESS_TYPE; ++type) {
if(total_access[type] > 0)
- fprintf(fout, "\t%s[%s][%s] = %llu\n",
+ fprintf(fout, "\t%s[%s][%s] = %u\n",
m_cache_name.c_str(),
mem_access_type_str((enum mem_access_type)type),
"TOTAL_ACCESS",
@@ -803,7 +803,7 @@ void cache_stats::print_fail_stats(FILE *fout, const char *cache_name) const{
for (unsigned type = 0; type < NUM_MEM_ACCESS_TYPE; ++type) {
for (unsigned fail = 0; fail < NUM_CACHE_RESERVATION_FAIL_STATUS; ++fail) {
if(m_fail_stats[type][fail] > 0){
- fprintf(fout, "\t%s[%s][%s] = %u\n",
+ fprintf(fout, "\t%s[%s][%s] = %llu\n",
m_cache_name.c_str(),
mem_access_type_str((enum mem_access_type)type),
cache_fail_status_str((enum cache_reservation_fail_reason)fail),
@@ -1430,8 +1430,6 @@ data_cache::wr_miss_wa_lazy_fetch_on_read( new_addr_type addr,
{
new_addr_type block_addr = m_config.block_addr(addr);
- new_addr_type mshr_addr = m_config.mshr_addr(mf->get_addr());
-
//if the request writes to the whole cache line/sector, then, write and set cache line Modified.
//and no need to send read request to memory or reserve mshr
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 234a8d6..a70185e 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -475,10 +475,10 @@ void gpgpu_sim_config::reg_options(option_parser_t opp)
m_shader_config.reg_options(opp);
m_memory_config.reg_options(opp);
power_config::reg_options(opp);
- option_parser_register(opp, "-gpgpu_max_cycle", OPT_INT32, &gpu_max_cycle_opt,
+ option_parser_register(opp, "-gpgpu_max_cycle", OPT_INT64, &gpu_max_cycle_opt,
"terminates gpu simulation early (0 = no limit)",
"0");
- option_parser_register(opp, "-gpgpu_max_insn", OPT_INT32, &gpu_max_insn_opt,
+ option_parser_register(opp, "-gpgpu_max_insn", OPT_INT64, &gpu_max_insn_opt,
"terminates gpu simulation early (0 = no limit)",
"0");
option_parser_register(opp, "-gpgpu_max_cta", OPT_INT32, &gpu_max_cta_opt,
@@ -1126,8 +1126,8 @@ void gpgpu_sim::gpu_print_stat()
printf("gpu_tot_sim_insn = %lld\n", gpu_tot_sim_insn+gpu_sim_insn);
printf("gpu_tot_ipc = %12.4f\n", (float)(gpu_tot_sim_insn+gpu_sim_insn) / (gpu_tot_sim_cycle+gpu_sim_cycle));
printf("gpu_tot_issued_cta = %lld\n", gpu_tot_issued_cta + m_total_cta_launched);
- printf("gpu_occupancy = %.4f\% \n", gpu_occupancy.get_occ_fraction() * 100);
- printf("gpu_tot_occupancy = %.4f\% \n", (gpu_occupancy + gpu_tot_occupancy).get_occ_fraction() * 100);
+ printf("gpu_occupancy = %.4f%% \n", gpu_occupancy.get_occ_fraction() * 100);
+ printf("gpu_tot_occupancy = %.4f%% \n", (gpu_occupancy + gpu_tot_occupancy).get_occ_fraction() * 100);
fprintf(statfout, "max_total_param_size = %llu\n", gpgpu_ctx->device_runtime->g_max_total_param_size);
@@ -1153,7 +1153,7 @@ void gpgpu_sim::gpu_print_stat()
time_t curr_time;
time(&curr_time);
- unsigned long long elapsed_time = MAX( curr_time - GPGPUsim_ctx_ptr()->g_simulation_starttime, 1 );
+ unsigned long long elapsed_time = MAX( curr_time - gpgpu_ctx->the_gpgpusim->g_simulation_starttime, 1 );
printf( "gpu_total_sim_rate=%u\n", (unsigned)( ( gpu_tot_sim_insn + gpu_sim_insn ) / elapsed_time ) );
//shader_print_l1_miss_stat( stdout );
@@ -1368,7 +1368,7 @@ bool shader_core_ctx::occupy_shader_resource_1block(kernel_info_t & k, bool occu
m_occupied_regs += (padded_cta_size * ((kernel_info->regs+3)&~3));
m_occupied_ctas++;
- SHADER_DPRINTF(LIVENESS, "GPGPU-Sim uArch: Occupied %d threads, %d shared mem, %d registers, %d ctas\n",
+ SHADER_DPRINTF(LIVENESS, "GPGPU-Sim uArch: Occupied %u threads, %u shared mem, %u registers, %u ctas\n",
m_occupied_n_threads, m_occupied_shmem, m_occupied_regs, m_occupied_ctas);
}
@@ -1485,7 +1485,7 @@ void shader_core_ctx::issue_block2core( kernel_info_t &kernel )
nthreads_in_block += ptx_sim_init_thread(kernel,&m_thread[i],m_sid,i,cta_size-(i-start_thread),m_config->n_thread_per_shader,this,free_cta_hw_id,warp_id,m_cluster->get_gpu());
m_threadState[i].m_active = true;
// load thread local memory and register file
- if(m_gpu->resume_option==1 && kernel.get_uid()==m_gpu->resume_kernel && ctaid>=m_gpu->resume_CTA && ctaid<m_gpu->checkpoint_CTA_t )
+ if(m_gpu->resume_option == 1 && kernel.get_uid() == m_gpu->resume_kernel && ctaid >= m_gpu->resume_CTA && ctaid < m_gpu->checkpoint_CTA_t )
{
char fname[2048];
snprintf(fname,2048,"checkpoint_files/thread_%d_%d_reg.txt",i%cta_size,ctaid );
@@ -1500,7 +1500,7 @@ void shader_core_ctx::issue_block2core( kernel_info_t &kernel )
assert( nthreads_in_block > 0 && nthreads_in_block <= m_config->n_thread_per_shader); // should be at least one, but less than max
m_cta_status[free_cta_hw_id]=nthreads_in_block;
- if(m_gpu->resume_option==1 && kernel.get_uid()==m_gpu->resume_kernel && ctaid>=m_gpu->resume_CTA && ctaid<m_gpu->checkpoint_CTA_t )
+ if(m_gpu->resume_option == 1 && kernel.get_uid() == m_gpu->resume_kernel && ctaid >= m_gpu->resume_CTA && ctaid < m_gpu->checkpoint_CTA_t )
{
char f1name[2048];
snprintf(f1name,2048,"checkpoint_files/shared_mem_%d.txt", ctaid);
@@ -1726,7 +1726,7 @@ void gpgpu_sim::cycle()
time_t days, hrs, minutes, sec;
time_t curr_time;
time(&curr_time);
- unsigned long long elapsed_time = MAX(curr_time - GPGPUsim_ctx_ptr()->g_simulation_starttime, 1);
+ unsigned long long elapsed_time = MAX(curr_time - gpgpu_ctx->the_gpgpusim->g_simulation_starttime, 1);
if ( (elapsed_time - last_liveness_message_time) >= m_config.liveness_message_freq && DTRACE(LIVENESS) ) {
days = elapsed_time/(3600*24);
hrs = elapsed_time/3600 - 24*days;
diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h
index 6b57bd8..86d6206 100644
--- a/src/gpgpu-sim/gpu-sim.h
+++ b/src/gpgpu-sim/gpu-sim.h
@@ -371,8 +371,8 @@ private:
double l2_period;
// GPGPU-Sim timing model options
- unsigned gpu_max_cycle_opt;
- unsigned gpu_max_insn_opt;
+ unsigned long long gpu_max_cycle_opt;
+ unsigned long long gpu_max_insn_opt;
unsigned gpu_max_cta_opt;
char *gpgpu_runtime_stat;
bool gpgpu_flush_l1_cache;
diff --git a/src/gpgpu-sim/l2cache.cc b/src/gpgpu-sim/l2cache.cc
index 39a5812..fb4ce32 100644
--- a/src/gpgpu-sim/l2cache.cc
+++ b/src/gpgpu-sim/l2cache.cc
@@ -82,7 +82,7 @@ void memory_partition_unit::handle_memcpy_to_gpu( size_t addr, unsigned global_s
unsigned p = global_sub_partition_id_to_local_id(global_subpart_id);
std::string mystring =
mask.to_string<char,std::string::traits_type,std::string::allocator_type>();
- MEMPART_DPRINTF("Copy Engine Request Received For Address=%llx, local_subpart=%u, global_subpart=%u, sector_mask=%s \n", addr, p, global_subpart_id, mystring.c_str());
+ MEMPART_DPRINTF("Copy Engine Request Received For Address=%zx, local_subpart=%u, global_subpart=%u, sector_mask=%s \n", addr, p, global_subpart_id, mystring.c_str());
m_sub_partition[p]->force_l2_tag_update(addr,m_gpu->gpu_sim_cycle+m_gpu->gpu_tot_sim_cycle, mask);
}
@@ -681,7 +681,7 @@ std::vector<mem_fetch*> memory_sub_partition::breakdown_request_to_sector_reques
}
} else
{
- printf("Invalid sector received, address = 0x%06x, sector mask = %s, data size = %d",
+ printf("Invalid sector received, address = 0x%06llx, sector mask = %s, data size = %d",
mf->get_addr(), mf->get_access_sector_mask(), mf->get_data_size());
assert(0 && "Undefined sector mask is received");
}
@@ -716,7 +716,7 @@ std::vector<mem_fetch*> memory_sub_partition::breakdown_request_to_sector_reques
byte_sector_mask <<= SECTOR_SIZE;
}
} else {
- printf("Invalid sector received, address = 0x%06x, sector mask = %d, byte mask = , data size = %d",
+ printf("Invalid sector received, address = 0x%06llx, sector mask = %d, byte mask = , data size = %u",
mf->get_addr(), mf->get_access_sector_mask().count(), mf->get_data_size());
assert(0 && "Undefined data size is received");
}
diff --git a/src/gpgpu-sim/local_interconnect.cc b/src/gpgpu-sim/local_interconnect.cc
index da8a65c..c70477c 100644
--- a/src/gpgpu-sim/local_interconnect.cc
+++ b/src/gpgpu-sim/local_interconnect.cc
@@ -253,7 +253,7 @@ LocalInterconnect::LocalInterconnect(const struct inct_config& m_localinct_confi
}
LocalInterconnect::~LocalInterconnect(){
- for (int i=0; i<m_inct_config.subnets; ++i) {
+ for (unsigned i = 0; i < m_inct_config.subnets; ++i) {
delete net[i];
}
}
diff --git a/src/gpgpu-sim/scoreboard.cc b/src/gpgpu-sim/scoreboard.cc
index 80f95c6..1017e75 100644
--- a/src/gpgpu-sim/scoreboard.cc
+++ b/src/gpgpu-sim/scoreboard.cc
@@ -140,10 +140,10 @@ bool Scoreboard::checkCollision( unsigned wid, const class inst_t *inst ) const
// Get list of all input and output registers
std::set<int> inst_regs;
- for(int iii=0;iii<inst->outcount;iii++)
+ for(unsigned iii=0; iii < inst->outcount; iii++)
inst_regs.insert(inst->out[iii]);
- for(int jjj=0;jjj<inst->incount;jjj++)
+ for(unsigned jjj=0;jjj<inst->incount;jjj++)
inst_regs.insert(inst->in[jjj]);
if(inst->pred > 0) inst_regs.insert(inst->pred);
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index 0514a77..86508f6 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -87,7 +87,7 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu,
shader_core_stats *stats )
: core_t( gpu, NULL, config->warp_size, config->n_thread_per_shader ),
m_barriers( this, config->max_warps_per_shader, config->max_cta_per_core, config->max_barriers_per_cta, config->warp_size ),
- m_dynamic_warp_id(0), m_active_warps(0)
+ m_active_warps(0), m_dynamic_warp_id(0)
{
m_cluster = cluster;
m_config = config;
@@ -164,7 +164,7 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu,
NUM_CONCRETE_SCHEDULERS;
assert ( scheduler != NUM_CONCRETE_SCHEDULERS );
- for (int i = 0; i < m_config->gpgpu_num_sched_per_core; i++) {
+ for (unsigned i = 0; i < m_config->gpgpu_num_sched_per_core; i++) {
switch( scheduler )
{
case CONCRETE_SCHEDULER_LRR:
@@ -263,7 +263,7 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu,
//distribute i's evenly though schedulers;
schedulers[i%m_config->gpgpu_num_sched_per_core]->add_supervised_warp_id(i);
}
- for ( int i = 0; i < m_config->gpgpu_num_sched_per_core; ++i ) {
+ for ( unsigned i = 0; i < m_config->gpgpu_num_sched_per_core; ++i ) {
schedulers[i]->done_adding_supervised_warps();
}
@@ -474,7 +474,7 @@ void shader_core_ctx::init_warps( unsigned cta_id, unsigned start_thread, unsign
}
m_simt_stack[i]->launch(start_pc,active_threads);
- if(m_gpu->resume_option==1 && kernel_id==m_gpu->resume_kernel && ctaid>=m_gpu->resume_CTA && ctaid<m_gpu->checkpoint_CTA_t )
+ if(m_gpu->resume_option == 1 && kernel_id == m_gpu->resume_kernel && ctaid >= m_gpu->resume_CTA && ctaid < m_gpu->checkpoint_CTA_t )
{
char fname[2048];
snprintf(fname,2048,"checkpoint_files/warp_%d_%d_simt.txt",i%warp_per_cta,ctaid );
@@ -868,7 +868,7 @@ void shader_core_ctx::func_exec_inst( warp_inst_t &inst )
void shader_core_ctx::issue_warp( register_set& pipe_reg_set, const warp_inst_t* next_inst, const active_mask_t &active_mask, unsigned warp_id, unsigned sch_id )
{
- warp_inst_t** pipe_reg = pipe_reg = pipe_reg_set.get_free(m_config->sub_core_model, sch_id);
+ warp_inst_t** pipe_reg = pipe_reg_set.get_free(m_config->sub_core_model, sch_id);
assert(pipe_reg);
m_warp[warp_id].ibuffer_free();
@@ -2147,7 +2147,7 @@ ldst_unit::ldst_unit( mem_fetch_interface *icnt,
l1_latency_queue.resize(m_config->m_L1D_config.l1_banks);
assert(m_config->m_L1D_config.l1_latency > 0);
- for(int j=0; j<m_config->m_L1D_config.l1_banks; j++ )
+ for(unsigned j = 0; j < m_config->m_L1D_config.l1_banks; j++ )
l1_latency_queue[j].resize(m_config->m_L1D_config.l1_latency,(mem_fetch*)NULL);
}
@@ -2459,7 +2459,7 @@ void shader_core_ctx::register_cta_thread_exit( unsigned cta_num, kernel_info_t
m_barriers.deallocate_barrier(cta_num);
shader_CTA_count_unlog(m_sid, 1);
- SHADER_DPRINTF(LIVENESS, "GPGPU-Sim uArch: Finished CTA #%d (%lld,%lld), %u CTAs running\n",
+ SHADER_DPRINTF(LIVENESS, "GPGPU-Sim uArch: Finished CTA #%u (%lld,%lld), %u CTAs running\n",
cta_num, m_gpu->gpu_sim_cycle, m_gpu->gpu_tot_sim_cycle, m_n_active_cta);
if( m_n_active_cta == 0 ) {
diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h
index 62e0e42..667cb2d 100644
--- a/src/gpgpu-sim/shader.h
+++ b/src/gpgpu-sim/shader.h
@@ -1392,9 +1392,9 @@ class shader_core_config : public core_config
If we won't remove it, old regression will be broken.
So to support the legacy config files it's best to handle in this way.
*/
- int num_config_to_read=N_PIPELINE_STAGES-2*(!gpgpu_tensor_core_avail);
+ int num_config_to_read= N_PIPELINE_STAGES - 2 * (!gpgpu_tensor_core_avail);
- for (unsigned i = 0; i <num_config_to_read; i++) {
+ for (int i = 0; i < num_config_to_read; i++) {
assert(toks);
ntok = sscanf(toks,"%d", &pipe_widths[i]);
assert(ntok == 1);
@@ -1455,7 +1455,7 @@ class shader_core_config : public core_config
bool gpgpu_dwf_reg_bankconflict;
- int gpgpu_num_sched_per_core;
+ unsigned gpgpu_num_sched_per_core;
int gpgpu_max_insn_issue_per_warp;
bool gpgpu_dual_issue_diff_exec_units;
diff --git a/src/gpgpusim_entrypoint.cc b/src/gpgpusim_entrypoint.cc
index 4da74c0..69cc1b0 100644
--- a/src/gpgpusim_entrypoint.cc
+++ b/src/gpgpusim_entrypoint.cc
@@ -43,45 +43,28 @@ static int sg_argc = 3;
static const char *sg_argv[] = {"", "-config","gpgpusim.config"};
-GPGPUsim_ctx* the_gpgpusim = NULL;
-
-GPGPUsim_ctx* GPGPUsim_ctx_ptr(){
- if(the_gpgpusim == NULL)
- the_gpgpusim = GPGPU_Context()->the_gpgpusim;
-
- return the_gpgpusim;
-}
-
-class gpgpu_sim* g_the_gpu() {
- return GPGPUsim_ctx_ptr()->g_the_gpu;
-}
-
-class stream_manager* g_stream_manager() {
- return GPGPUsim_ctx_ptr()->g_stream_manager;
-}
-
-
-void *gpgpu_sim_thread_sequential(void*)
+void * gpgpu_sim_thread_sequential(void * ctx_ptr)
{
+ gpgpu_context * ctx = (gpgpu_context *)ctx_ptr;
// at most one kernel running at a time
bool done;
do {
- sem_wait(&(GPGPUsim_ctx_ptr()->g_sim_signal_start));
+ sem_wait(&(ctx->the_gpgpusim->g_sim_signal_start));
done = true;
- if( GPGPUsim_ctx_ptr()->g_the_gpu->get_more_cta_left() ) {
+ if( ctx->the_gpgpusim->g_the_gpu->get_more_cta_left() ) {
done = false;
- GPGPUsim_ctx_ptr()->g_the_gpu->init();
- while( GPGPUsim_ctx_ptr()->g_the_gpu->active() ) {
- GPGPUsim_ctx_ptr()->g_the_gpu->cycle();
- GPGPUsim_ctx_ptr()->g_the_gpu->deadlock_check();
+ ctx->the_gpgpusim->g_the_gpu->init();
+ while( ctx->the_gpgpusim->g_the_gpu->active() ) {
+ ctx->the_gpgpusim->g_the_gpu->cycle();
+ ctx->the_gpgpusim->g_the_gpu->deadlock_check();
}
- GPGPUsim_ctx_ptr()->g_the_gpu->print_stats();
- GPGPUsim_ctx_ptr()->g_the_gpu->update_stats();
- print_simulation_time();
+ ctx->the_gpgpusim->g_the_gpu->print_stats();
+ ctx->the_gpgpusim->g_the_gpu->update_stats();
+ ctx->print_simulation_time();
}
- sem_post(&(GPGPUsim_ctx_ptr()->g_sim_signal_finish));
+ sem_post(&(ctx->the_gpgpusim->g_sim_signal_finish));
} while(!done);
- sem_post(&(GPGPUsim_ctx_ptr()->g_sim_signal_exit));
+ sem_post(&(ctx->the_gpgpusim->g_sim_signal_exit));
return NULL;
}
@@ -93,8 +76,9 @@ static void termination_callback()
fflush(stdout);
}
-void *gpgpu_sim_thread_concurrent(void*)
+void *gpgpu_sim_thread_concurrent(void * ctx_ptr)
{
+ gpgpu_context * ctx = (gpgpu_context *)ctx_ptr;
atexit(termination_callback);
// concurrent kernel execution simulation thread
do {
@@ -102,19 +86,19 @@ void *gpgpu_sim_thread_concurrent(void*)
printf("GPGPU-Sim: *** simulation thread starting and spinning waiting for work ***\n");
fflush(stdout);
}
- while( GPGPUsim_ctx_ptr()->g_stream_manager->empty_protected() && !GPGPUsim_ctx_ptr()->g_sim_done )
+ while( ctx->the_gpgpusim->g_stream_manager->empty_protected() && !ctx->the_gpgpusim->g_sim_done )
;
if(g_debug_execution >= 3) {
printf("GPGPU-Sim: ** START simulation thread (detected work) **\n");
- GPGPUsim_ctx_ptr()->g_stream_manager->print(stdout);
+ ctx->the_gpgpusim->g_stream_manager->print(stdout);
fflush(stdout);
}
- pthread_mutex_lock(&(GPGPUsim_ctx_ptr()->g_sim_lock));
- GPGPUsim_ctx_ptr()->g_sim_active = true;
- pthread_mutex_unlock(&(GPGPUsim_ctx_ptr()->g_sim_lock));
+ pthread_mutex_lock(&(ctx->the_gpgpusim->g_sim_lock));
+ ctx->the_gpgpusim->g_sim_active = true;
+ pthread_mutex_unlock(&(ctx->the_gpgpusim->g_sim_lock));
bool active = false;
bool sim_cycles = false;
- GPGPUsim_ctx_ptr()->g_the_gpu->init();
+ ctx->the_gpgpusim->g_the_gpu->init();
do {
// check if a kernel has completed
// launch operation on device if one is pending and can be run
@@ -126,82 +110,82 @@ void *gpgpu_sim_thread_concurrent(void*)
// another kernel, the gpu is not re-initialized and the inter-kernel
// behaviour may be incorrect. Check that a kernel has finished and
// no other kernel is currently running.
- if(GPGPUsim_ctx_ptr()->g_stream_manager->operation(&sim_cycles) && !GPGPUsim_ctx_ptr()->g_the_gpu->active())
+ if(ctx->the_gpgpusim->g_stream_manager->operation(&sim_cycles) && !ctx->the_gpgpusim->g_the_gpu->active())
break;
//functional simulation
- if( GPGPUsim_ctx_ptr()->g_the_gpu->is_functional_sim()) {
- kernel_info_t * kernel = GPGPUsim_ctx_ptr()->g_the_gpu->get_functional_kernel();
+ if( ctx->the_gpgpusim->g_the_gpu->is_functional_sim()) {
+ kernel_info_t * kernel = ctx->the_gpgpusim->g_the_gpu->get_functional_kernel();
assert(kernel);
- GPGPUsim_ctx_ptr()->gpgpu_ctx->func_sim->gpgpu_cuda_ptx_sim_main_func(*kernel);
- GPGPUsim_ctx_ptr()->g_the_gpu->finish_functional_sim(kernel);
+ ctx->the_gpgpusim->gpgpu_ctx->func_sim->gpgpu_cuda_ptx_sim_main_func(*kernel);
+ ctx->the_gpgpusim->g_the_gpu->finish_functional_sim(kernel);
}
//performance simulation
- if( GPGPUsim_ctx_ptr()->g_the_gpu->active() ) {
- GPGPUsim_ctx_ptr()->g_the_gpu->cycle();
+ if( ctx->the_gpgpusim->g_the_gpu->active() ) {
+ ctx->the_gpgpusim->g_the_gpu->cycle();
sim_cycles = true;
- GPGPUsim_ctx_ptr()->g_the_gpu->deadlock_check();
+ ctx->the_gpgpusim->g_the_gpu->deadlock_check();
}else {
- if(GPGPUsim_ctx_ptr()->g_the_gpu->cycle_insn_cta_max_hit()){
- GPGPUsim_ctx_ptr()->g_stream_manager->stop_all_running_kernels();
- GPGPUsim_ctx_ptr()->g_sim_done = true;
- GPGPUsim_ctx_ptr()->break_limit = true;
+ if(ctx->the_gpgpusim->g_the_gpu->cycle_insn_cta_max_hit()){
+ ctx->the_gpgpusim->g_stream_manager->stop_all_running_kernels();
+ ctx->the_gpgpusim->g_sim_done = true;
+ ctx->the_gpgpusim->break_limit = true;
}
}
- active=GPGPUsim_ctx_ptr()->g_the_gpu->active() || !(GPGPUsim_ctx_ptr()->g_stream_manager->empty_protected());
+ active=ctx->the_gpgpusim->g_the_gpu->active() || !(ctx->the_gpgpusim->g_stream_manager->empty_protected());
- } while( active && !GPGPUsim_ctx_ptr()->g_sim_done);
+ } while( active && !ctx->the_gpgpusim->g_sim_done);
if(g_debug_execution >= 3) {
printf("GPGPU-Sim: ** STOP simulation thread (no work) **\n");
fflush(stdout);
}
if(sim_cycles) {
- GPGPUsim_ctx_ptr()->g_the_gpu->print_stats();
- GPGPUsim_ctx_ptr()->g_the_gpu->update_stats();
- print_simulation_time();
+ ctx->the_gpgpusim->g_the_gpu->print_stats();
+ ctx->the_gpgpusim->g_the_gpu->update_stats();
+ ctx->print_simulation_time();
}
- pthread_mutex_lock(&(GPGPUsim_ctx_ptr()->g_sim_lock));
- GPGPUsim_ctx_ptr()->g_sim_active = false;
- pthread_mutex_unlock(&(GPGPUsim_ctx_ptr()->g_sim_lock));
- } while( !GPGPUsim_ctx_ptr()->g_sim_done );
+ pthread_mutex_lock(&(ctx->the_gpgpusim->g_sim_lock));
+ ctx->the_gpgpusim->g_sim_active = false;
+ pthread_mutex_unlock(&(ctx->the_gpgpusim->g_sim_lock));
+ } while( !ctx->the_gpgpusim->g_sim_done );
printf("GPGPU-Sim: *** simulation thread exiting ***\n");
fflush(stdout);
- if(GPGPUsim_ctx_ptr()->break_limit) {
+ if(ctx->the_gpgpusim->break_limit) {
printf("GPGPU-Sim: ** break due to reaching the maximum cycles (or instructions) **\n");
exit(1);
}
- sem_post(&(GPGPUsim_ctx_ptr()->g_sim_signal_exit));
+ sem_post(&(ctx->the_gpgpusim->g_sim_signal_exit));
return NULL;
}
-void synchronize()
+void gpgpu_context::synchronize()
{
printf("GPGPU-Sim: synchronize waiting for inactive GPU simulation\n");
- GPGPUsim_ctx_ptr()->g_stream_manager->print(stdout);
+ the_gpgpusim->g_stream_manager->print(stdout);
fflush(stdout);
// sem_wait(&g_sim_signal_finish);
bool done = false;
do {
- pthread_mutex_lock(&(GPGPUsim_ctx_ptr()->g_sim_lock));
- done = ( GPGPUsim_ctx_ptr()->g_stream_manager->empty() && !GPGPUsim_ctx_ptr()->g_sim_active ) || GPGPUsim_ctx_ptr()->g_sim_done;
- pthread_mutex_unlock(&(GPGPUsim_ctx_ptr()->g_sim_lock));
+ pthread_mutex_lock(&(the_gpgpusim->g_sim_lock));
+ done = ( the_gpgpusim->g_stream_manager->empty() && !the_gpgpusim->g_sim_active ) || the_gpgpusim->g_sim_done;
+ pthread_mutex_unlock(&(the_gpgpusim->g_sim_lock));
} while (!done);
printf("GPGPU-Sim: detected inactive GPU simulation thread\n");
fflush(stdout);
// sem_post(&g_sim_signal_start);
}
-void exit_simulation()
+void gpgpu_context::exit_simulation()
{
- GPGPUsim_ctx_ptr()->g_sim_done=true;
+ the_gpgpusim->g_sim_done=true;
printf("GPGPU-Sim: exit_simulation called\n");
fflush(stdout);
- sem_wait(&(GPGPUsim_ctx_ptr()->g_sim_signal_exit));
+ sem_wait(&(the_gpgpusim->g_sim_signal_exit));
printf("GPGPU-Sim: simulation thread signaled exit\n");
fflush(stdout);
}
@@ -218,8 +202,8 @@ gpgpu_sim *gpgpu_context::gpgpu_ptx_sim_init_perf()
func_sim->ptx_opcocde_latency_options(opp);
icnt_reg_options(opp);
- GPGPUsim_ctx_ptr()->g_the_gpu_config = new gpgpu_sim_config(this);
- GPGPUsim_ctx_ptr()->g_the_gpu_config->reg_options(opp); // register GPU microrachitecture options
+ the_gpgpusim->g_the_gpu_config = new gpgpu_sim_config(this);
+ the_gpgpusim->g_the_gpu_config->reg_options(opp); // register GPU microrachitecture options
option_parser_cmdline(opp, sg_argc, sg_argv); // parse configuration options
fprintf(stdout, "GPGPU-Sim: Configuration options:\n\n");
@@ -227,18 +211,18 @@ gpgpu_sim *gpgpu_context::gpgpu_ptx_sim_init_perf()
// Set the Numeric locale to a standard locale where a decimal point is a "dot" not a "comma"
// so it does the parsing correctly independent of the system environment variables
assert(setlocale(LC_NUMERIC,"C"));
- GPGPUsim_ctx_ptr()->g_the_gpu_config->init();
+ the_gpgpusim->g_the_gpu_config->init();
- GPGPUsim_ctx_ptr()->g_the_gpu = new gpgpu_sim(*(GPGPUsim_ctx_ptr()->g_the_gpu_config), this);
- GPGPUsim_ctx_ptr()->g_stream_manager = new stream_manager((GPGPUsim_ctx_ptr()->g_the_gpu), func_sim->g_cuda_launch_blocking);
+ the_gpgpusim->g_the_gpu = new gpgpu_sim(*(the_gpgpusim->g_the_gpu_config), this);
+ the_gpgpusim->g_stream_manager = new stream_manager((the_gpgpusim->g_the_gpu), func_sim->g_cuda_launch_blocking);
- GPGPUsim_ctx_ptr()->g_simulation_starttime = time((time_t *)NULL);
+ the_gpgpusim->g_simulation_starttime = time((time_t *)NULL);
- sem_init(&(GPGPUsim_ctx_ptr()->g_sim_signal_start),0,0);
- sem_init(&(GPGPUsim_ctx_ptr()->g_sim_signal_finish),0,0);
- sem_init(&(GPGPUsim_ctx_ptr()->g_sim_signal_exit),0,0);
+ sem_init(&(the_gpgpusim->g_sim_signal_start),0,0);
+ sem_init(&(the_gpgpusim->g_sim_signal_finish),0,0);
+ sem_init(&(the_gpgpusim->g_sim_signal_exit),0,0);
- return GPGPUsim_ctx_ptr()->g_the_gpu;
+ return the_gpgpusim->g_the_gpu;
}
gpgpu_sim *gpgpu_context::gpgpu_trace_sim_init_perf(int argc, const char *argv[])
@@ -253,8 +237,8 @@ gpgpu_sim *gpgpu_context::gpgpu_trace_sim_init_perf(int argc, const char *argv[]
func_sim->ptx_opcocde_latency_options(opp);
icnt_reg_options(opp);
- GPGPUsim_ctx_ptr()->g_the_gpu_config = new gpgpu_sim_config(this);
- GPGPUsim_ctx_ptr()->g_the_gpu_config->reg_options(opp); // register GPU microrachitecture options
+ the_gpgpusim->g_the_gpu_config = new gpgpu_sim_config(this);
+ the_gpgpusim->g_the_gpu_config->reg_options(opp); // register GPU microrachitecture options
option_parser_cmdline(opp, argc, argv); // parse configuration options
fprintf(stdout, "GPGPU-Sim: Configuration options:\n\n");
@@ -262,33 +246,33 @@ gpgpu_sim *gpgpu_context::gpgpu_trace_sim_init_perf(int argc, const char *argv[]
// Set the Numeric locale to a standard locale where a decimal point is a "dot" not a "comma"
// so it does the parsing correctly independent of the system environment variables
assert(setlocale(LC_NUMERIC,"C"));
- GPGPUsim_ctx_ptr()->g_the_gpu_config->init();
+ the_gpgpusim->g_the_gpu_config->init();
- GPGPUsim_ctx_ptr()->g_the_gpu = new gpgpu_sim(*(GPGPUsim_ctx_ptr()->g_the_gpu_config), this);
- GPGPUsim_ctx_ptr()->g_stream_manager = new stream_manager((GPGPUsim_ctx_ptr()->g_the_gpu), func_sim->g_cuda_launch_blocking);
+ the_gpgpusim->g_the_gpu = new gpgpu_sim(*(the_gpgpusim->g_the_gpu_config), this);
+ the_gpgpusim->g_stream_manager = new stream_manager((the_gpgpusim->g_the_gpu), func_sim->g_cuda_launch_blocking);
- GPGPUsim_ctx_ptr()->g_simulation_starttime = time((time_t *)NULL);
+ the_gpgpusim->g_simulation_starttime = time((time_t *)NULL);
- return GPGPUsim_ctx_ptr()->g_the_gpu;
+ return the_gpgpusim->g_the_gpu;
}
-void start_sim_thread(int api)
+void gpgpu_context::start_sim_thread(int api)
{
- if( GPGPUsim_ctx_ptr()->g_sim_done ) {
- GPGPUsim_ctx_ptr()->g_sim_done = false;
+ if( the_gpgpusim->g_sim_done ) {
+ the_gpgpusim->g_sim_done = false;
if( api == 1 ) {
- pthread_create(&(GPGPUsim_ctx_ptr()->g_simulation_thread),NULL,gpgpu_sim_thread_concurrent,NULL);
+ pthread_create(&(the_gpgpusim->g_simulation_thread),NULL,gpgpu_sim_thread_concurrent,(void *)this);
} else {
- pthread_create(&(GPGPUsim_ctx_ptr()->g_simulation_thread),NULL,gpgpu_sim_thread_sequential,NULL);
+ pthread_create(&(the_gpgpusim->g_simulation_thread),NULL,gpgpu_sim_thread_sequential,(void *)this);
}
}
}
-void print_simulation_time()
+void gpgpu_context::print_simulation_time()
{
time_t current_time, difference, d, h, m, s;
current_time = time((time_t *)NULL);
- difference = MAX(current_time - GPGPUsim_ctx_ptr()->g_simulation_starttime, 1);
+ difference = MAX(current_time - the_gpgpusim->g_simulation_starttime, 1);
d = difference/(3600*24);
h = difference/3600 - 24*d;
@@ -298,16 +282,18 @@ void print_simulation_time()
fflush(stderr);
printf("\n\ngpgpu_simulation_time = %u days, %u hrs, %u min, %u sec (%u sec)\n",
(unsigned)d, (unsigned)h, (unsigned)m, (unsigned)s, (unsigned)difference );
- printf("gpgpu_simulation_rate = %u (inst/sec)\n", (unsigned)(GPGPUsim_ctx_ptr()->g_the_gpu->gpu_tot_sim_insn / difference) );
- printf("gpgpu_simulation_rate = %u (cycle/sec)\n", (unsigned)(GPGPUsim_ctx_ptr()->g_the_gpu->gpu_tot_sim_cycle / difference) );
+ printf("gpgpu_simulation_rate = %u (inst/sec)\n", (unsigned)(the_gpgpusim->g_the_gpu->gpu_tot_sim_insn / difference) );
+ const unsigned cycles_per_sec = (unsigned)(the_gpgpusim->g_the_gpu->gpu_tot_sim_cycle / difference);
+ printf("gpgpu_simulation_rate = %u (cycle/sec)\n", cycles_per_sec );
+ printf("gpgpu_silicon_slowdown = %ux\n", the_gpgpusim->g_the_gpu->shader_clock() * 1000 / cycles_per_sec);
fflush(stdout);
}
-int gpgpu_opencl_ptx_sim_main_perf( kernel_info_t *grid )
+int gpgpu_context::gpgpu_opencl_ptx_sim_main_perf( kernel_info_t *grid )
{
- GPGPUsim_ctx_ptr()->g_the_gpu->launch(grid);
- sem_post(&(GPGPUsim_ctx_ptr()->g_sim_signal_start));
- sem_wait(&(GPGPUsim_ctx_ptr()->g_sim_signal_finish));
+ the_gpgpusim->g_the_gpu->launch(grid);
+ sem_post(&(the_gpgpusim->g_sim_signal_start));
+ sem_wait(&(the_gpgpusim->g_sim_signal_finish));
return 0;
}
diff --git a/src/gpgpusim_entrypoint.h b/src/gpgpusim_entrypoint.h
index 4a8d796..9f408df 100644
--- a/src/gpgpusim_entrypoint.h
+++ b/src/gpgpusim_entrypoint.h
@@ -76,14 +76,4 @@ class GPGPUsim_ctx {
};
-void start_sim_thread(int api);
-
-class gpgpu_sim* g_the_gpu();
-struct GPGPUsim_ctx* GPGPUsim_ctx_ptr();
-class stream_manager* g_stream_manager();
-
-int gpgpu_opencl_ptx_sim_main_perf( kernel_info_t *grid );
-
-void print_simulation_time();
-
#endif
diff --git a/src/trace-driven/gpgpusim_trace_driven_main.cc b/src/trace-driven/gpgpusim_trace_driven_main.cc
index 3b9851e..4f973cd 100644
--- a/src/trace-driven/gpgpusim_trace_driven_main.cc
+++ b/src/trace-driven/gpgpusim_trace_driven_main.cc
@@ -66,7 +66,7 @@ int main ( int argc, const char **argv )
m_gpgpu_sim->deadlock_check();
}else {
if(m_gpgpu_sim->cycle_insn_cta_max_hit()){
- g_stream_manager()->stop_all_running_kernels();
+ m_gpgpu_context->the_gpgpusim->g_stream_manager->stop_all_running_kernels();
break_limit = true;
}
}
@@ -81,7 +81,7 @@ int main ( int argc, const char **argv )
if(sim_cycles) {
m_gpgpu_sim->update_stats();
- print_simulation_time();
+ m_gpgpu_context->print_simulation_time();
}
if(break_limit) {