diff options
| author | Ahmed El-Shafiey <[email protected]> | 2013-01-25 00:07:31 -0800 |
|---|---|---|
| committer | Andrew Boktor <[email protected]> | 2014-08-14 13:49:24 -0700 |
| commit | 8c087fa6baa2268a2675c3fec772f2bd696f080e (patch) | |
| tree | c6d89f2400c7f161c770c810f88f2ebe947c40ce /src | |
| parent | c8642d768dd2aed56faffff813b605fd36e92711 (diff) | |
fixing bug 36 + put a mistakenly missing texture misses power scaling
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15105]
Diffstat (limited to 'src')
| -rw-r--r-- | src/cuda-sim/cuda-sim.cc | 5 | ||||
| -rw-r--r-- | src/gpuwattch/gpgpu_sim_wrapper.cc | 2 |
2 files changed, 4 insertions, 3 deletions
diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index 0e6ba7e..1e0ed6f 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -1110,8 +1110,9 @@ void init_inst_classification_stat() if( init.find(g_ptx_kernel_count) != init.end() ) return; init.insert(g_ptx_kernel_count); - char kernelname[256] =""; -#define MAX_CLASS_KER 1024 + + #define MAX_CLASS_KER 1024 + char kernelname[MAX_CLASS_KER] =""; if (!g_inst_classification_stat) g_inst_classification_stat = (void**)calloc(MAX_CLASS_KER, sizeof(void*)); snprintf(kernelname, MAX_CLASS_KER, "Kernel %d Classification\n",g_ptx_kernel_count ); assert( g_ptx_kernel_count < MAX_CLASS_KER ) ; // a static limit on number of kernels increase it if it fails! diff --git a/src/gpuwattch/gpgpu_sim_wrapper.cc b/src/gpuwattch/gpgpu_sim_wrapper.cc index ffd4650..22d0659 100644 --- a/src/gpuwattch/gpgpu_sim_wrapper.cc +++ b/src/gpuwattch/gpgpu_sim_wrapper.cc @@ -275,7 +275,7 @@ void gpgpu_sim_wrapper::set_ccache_power(double hits, double misses) void gpgpu_sim_wrapper::set_tcache_power(double hits, double misses) { p->sys.core[0].tcache.read_accesses = hits * p->sys.scaling_coefficients[TC_H]+misses * p->sys.scaling_coefficients[TC_M]; - p->sys.core[0].tcache.read_misses = misses; + p->sys.core[0].tcache.read_misses = misses* p->sys.scaling_coefficients[TC_M]; perf_count[TC_H]=hits; perf_count[TC_M]=misses; // TODO: coalescing logic is counted as part of the caches power (this is not valid for no-caches architectures) |