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authoraamir <[email protected]>2018-06-06 16:31:03 -0700
committeraamir <[email protected]>2018-06-06 16:31:03 -0700
commita089ac9ed1c798108bd0866e422392d6873f6681 (patch)
tree4e7da79beed2270f1ba8095154a49ef7489591f3 /src
parent4161ccba0d4a99157afed3cdccef0e9c2a6d89e6 (diff)
added profilling xls and changes for regression
Diffstat (limited to 'src')
-rw-r--r--src/cuda-sim/cuda-math.h4
-rw-r--r--src/cuda-sim/instructions.cc32
-rw-r--r--src/cuda-sim/ptx_sim.h11
3 files changed, 29 insertions, 18 deletions
diff --git a/src/cuda-sim/cuda-math.h b/src/cuda-sim/cuda-math.h
index e38e499..314f813 100644
--- a/src/cuda-sim/cuda-math.h
+++ b/src/cuda-sim/cuda-math.h
@@ -322,7 +322,7 @@ float __internal_accurate_fdividef(float a, float b)
float __saturatef(float a)
{
float b;
- if (isnan(a)) b = 0.0f;
+ if (std::isnan(a)) b = 0.0f;
else if (a >= 1.0f) b = 1.0f;
else if (a <= 0.0f) b = 0.0f;
else b = a;
@@ -358,7 +358,7 @@ int __signbitd(double d)
#ifdef __APPLE__
int isnanf(float a)
{
- return (isnan(a));
+ return (std::isnan(a));
}
#endif
diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc
index f314e62..59415f4 100644
--- a/src/cuda-sim/instructions.cc
+++ b/src/cuda-sim/instructions.cc
@@ -1644,9 +1644,9 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
for(k=0;k<8;k++){
if(k%2==0)
- hex_val=((v[k/2].s64&0xffff0000)>>16);
- else
hex_val=(v[k/2].s64&0xffff);
+ else
+ hex_val=((v[k/2].s64&0xffff0000)>>16);
nw_v[k].f16 =*((half *)&hex_val);
matrix_c[row+k][offset]=nw_v[k];
}
@@ -1767,10 +1767,10 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
}
else if(type==F16_TYPE){
ptx_reg_t nw_data1, nw_data2, nw_data3, nw_data4;
- nw_data1.s64=((matrix_d[row][offset].s64 & 0xffff)<<16)|((matrix_d[row+1][offset].s64&0xffff));
- nw_data2.s64=((matrix_d[row+2][offset].s64 & 0xffff)<<16)|((matrix_d[row+3][offset].s64&0xffff));
- nw_data3.s64=((matrix_d[row+4][offset].s64 & 0xffff)<<16)|((matrix_d[row+5][offset].s64&0xffff));
- nw_data4.s64=((matrix_d[row+6][offset].s64 & 0xffff)<<16)|((matrix_d[row+7][offset].s64&0xffff));
+ nw_data1.s64=((matrix_d[row][offset].s64 & 0xffff))|((matrix_d[row+1][offset].s64&0xffff)<<16);
+ nw_data2.s64=((matrix_d[row+2][offset].s64 & 0xffff))|((matrix_d[row+3][offset].s64&0xffff)<<16);
+ nw_data3.s64=((matrix_d[row+4][offset].s64 & 0xffff))|((matrix_d[row+5][offset].s64&0xffff)<<16);
+ nw_data4.s64=((matrix_d[row+6][offset].s64 & 0xffff))|((matrix_d[row+7][offset].s64&0xffff)<<16);
thread->set_vector_operand_values(dst,nw_data1,nw_data2,nw_data3,nw_data4);
printf("thread%d=%x,%x,%x,%x",thrd,nw_data1.s64,nw_data2.s64,nw_data3.s64,nw_data4.s64);
@@ -2295,7 +2295,7 @@ ptx_reg_t d2d( ptx_reg_t x, unsigned from_width, unsigned to_width, int to_sign,
y.f64 = x.f64;
break;
}
- if (isnan(y.f64)) {
+ if (std::isnan(y.f64)) {
y.u64 = 0xfff8000000000000ull;
} else if (saturation_mode) {
y.f64 = cuda_math::__saturatef(y.f64);
@@ -2426,7 +2426,7 @@ void ptx_round(ptx_reg_t& data, int rounding_mode, int type)
}
}
if ((type == F64_TYPE)||(type == FF64_TYPE)) {
- if (isnan(data.f64)) {
+ if (std::isnan(data.f64)) {
data.u64 = 0xfff8000000000000ull;
}
}
@@ -2828,9 +2828,9 @@ void mma_st_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
ptx_reg_t nw_v[8];
for(k=0;k<8;k++){
if(k%2==0)
- nw_v[k].s64=((v[k/2].s64&0xffff0000)>>16);
- else
nw_v[k].s64=(v[k/2].s64&0xffff);
+ else
+ nw_v[k].s64=((v[k/2].s64&0xffff0000)>>16);
}
for(k=0;k<8;k++){
@@ -2905,10 +2905,10 @@ void mma_ld_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
}
else{
ptx_reg_t nw_data1, nw_data2, nw_data3, nw_data4;
- nw_data1.s64=((data1.s64 & 0xffff)<<16)|((data2.s64&0xffff));
- nw_data2.s64=((data3.s64 & 0xffff)<<16)|((data4.s64&0xffff));
- nw_data3.s64=((data5.s64 & 0xffff)<<16)|((data6.s64&0xffff));
- nw_data4.s64=((data7.s64 & 0xffff)<<16)|((data8.s64&0xffff));
+ nw_data1.s64=((data1.s64 & 0xffff))|((data2.s64&0xffff)<<16);
+ nw_data2.s64=((data3.s64 & 0xffff))|((data4.s64&0xffff)<<16);
+ nw_data3.s64=((data5.s64 & 0xffff))|((data6.s64&0xffff)<<16);
+ nw_data4.s64=((data7.s64 & 0xffff))|((data8.s64&0xffff)<<16);
printf("wmma_load:data1.s64=%x,data2.s64=%x,new_data1.s64=%x\n",data1.s64,data2.s64,nw_data1.s64);
printf("wmma_load:data3.s64=%x,data4.s64=%x,new_data2.s64=%x\n",data3.s64,data4.s64,nw_data2.s64);
printf("wmma_load:data5.s64=%x,data6.s64=%x,new_data3.s64=%x\n",data5.s64,data6.s64,nw_data3.s64);
@@ -3139,12 +3139,12 @@ void mad_def( const ptx_instruction *pI, ptx_thread_info *thread, bool use_carry
bool isNaN(float x)
{
- return isnan(x);
+ return std::isnan(x);
}
bool isNaN(double x)
{
- return isnan(x);
+ return std::isnan(x);
}
void max_impl( const ptx_instruction *pI, ptx_thread_info *thread )
diff --git a/src/cuda-sim/ptx_sim.h b/src/cuda-sim/ptx_sim.h
index fbd7881..ea87e59 100644
--- a/src/cuda-sim/ptx_sim.h
+++ b/src/cuda-sim/ptx_sim.h
@@ -42,6 +42,12 @@
#include "memory.h"
+#define GCC_VERSION (__GNUC__ * 10000 \
+ + __GNUC_MINOR__ * 100 \
+ + __GNUC_PATCHLEVEL__)
+
+
+
struct param_t {
const void *pdata;
int type;
@@ -128,7 +134,12 @@ union ptx_reg_t {
unsigned short u16;
unsigned int u32;
unsigned long long u64;
+ //gcc 4.7.0
+ #if GCC_VERSION >= 40700
half f16;
+ #else
+ float f16;
+ #endif
float f32;
double f64;
struct {