diff options
| author | Tor Aamodt <[email protected]> | 2010-08-10 18:04:54 -0800 |
|---|---|---|
| committer | Tor Aamodt <[email protected]> | 2010-08-10 18:04:54 -0800 |
| commit | b621489268b00e816eb18e72be53f9a049787ffb (patch) | |
| tree | 7acb45634570179f27caaed9ae8243868c72c549 /src | |
| parent | 6eb2c84753d4538ef6ee6ee27802bff9adbbefab (diff) | |
refactor: mostly finished getting rid of extern decl
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7183]
Diffstat (limited to 'src')
| -rw-r--r-- | src/cuda-sim/cuda-sim.h | 4 | ||||
| -rw-r--r-- | src/cuda-sim/ptx_ir.h | 5 | ||||
| -rw-r--r-- | src/debug.h | 2 | ||||
| -rw-r--r-- | src/gpgpu-sim/addrdec.h | 4 | ||||
| -rw-r--r-- | src/gpgpu-sim/dwf.h | 3 | ||||
| -rw-r--r-- | src/gpgpu-sim/gpu-cache.cc | 10 | ||||
| -rw-r--r-- | src/gpgpu-sim/gpu-cache.h | 3 | ||||
| -rw-r--r-- | src/gpgpu-sim/gpu-sim.cc | 74 | ||||
| -rw-r--r-- | src/gpgpu-sim/gpu-sim.h | 3 | ||||
| -rw-r--r-- | src/gpgpu-sim/l2cache.cc | 2 | ||||
| -rw-r--r-- | src/gpgpu-sim/l2cache.h | 1 | ||||
| -rw-r--r-- | src/gpgpu-sim/shader.cc | 3 | ||||
| -rw-r--r-- | src/gpgpu-sim/shader.h | 31 | ||||
| -rw-r--r-- | src/gpgpu-sim/stat-tool.h | 4 | ||||
| -rw-r--r-- | src/gpgpu-sim/visualizer.cc | 20 | ||||
| -rw-r--r-- | src/gpgpu-sim/warp_tracker.cc | 7 | ||||
| -rw-r--r-- | src/intersim/interconnect_interface.cpp | 2 |
17 files changed, 65 insertions, 113 deletions
diff --git a/src/cuda-sim/cuda-sim.h b/src/cuda-sim/cuda-sim.h index 7e05f7e..baf3b63 100644 --- a/src/cuda-sim/cuda-sim.h +++ b/src/cuda-sim/cuda-sim.h @@ -17,6 +17,10 @@ extern memory_space *g_global_mem; extern int g_debug_execution; extern int g_debug_thread_uid; extern std::map<std::string,function_info*> *g_kernel_name_to_function_lookup; +extern void ** g_inst_classification_stat; +extern void ** g_inst_op_classification_stat; +extern int g_ptx_kernel_count; // used for classification stat collection purposes + extern void gpgpu_cuda_ptx_sim_init_grid( const char *kernel_key, struct gpgpu_ptx_sim_arg *args, diff --git a/src/cuda-sim/ptx_ir.h b/src/cuda-sim/ptx_ir.h index 1b1d864..ce68505 100644 --- a/src/cuda-sim/ptx_ir.h +++ b/src/cuda-sim/ptx_ir.h @@ -1194,6 +1194,7 @@ void copy_args_into_buffer_list( const ptx_instruction * pI, void copy_buffer_list_into_frame(ptx_thread_info * thread, arg_buffer_list_t &arg_values); void copy_buffer_to_frame(ptx_thread_info * thread, const arg_buffer_t &a); +#if !defined(__CUDA_RUNTIME_API_H__) /*******************************/ // These declarations should be identical to those in ./../../cuda-sim-dev/libcuda/texture_types.h enum cudaChannelFormatKind { @@ -1241,8 +1242,8 @@ struct textureReference { enum cudaTextureAddressMode addressMode[2]; struct cudaChannelFormatDesc channelDesc; }; - /**********************************/ +#endif struct textureInfo { unsigned int texel_size; //size in bytes, e.g. (channelDesc.x+y+z+w)/8 @@ -1274,5 +1275,7 @@ extern std::map<std::string,symbol_table*> g_sym_name_to_symbol_table; void gpgpu_ptx_assemble( std::string kname, void *kinfo ); #include "../option_parser.h" void ptx_reg_options(option_parser_t opp); +unsigned ptx_kernel_shmem_size( void *kernel_impl ); +unsigned ptx_kernel_nregs( void *kernel_impl ); #endif diff --git a/src/debug.h b/src/debug.h index 463780a..a6f2b10 100644 --- a/src/debug.h +++ b/src/debug.h @@ -56,6 +56,8 @@ private: unsigned m_value; }; +extern int gpgpu_ptx_instruction_classification ; + class ptx_thread_info; class ptx_instruction; bool thread_at_brkpt( void *ptx_thd_info, const struct brk_pt &b ); diff --git a/src/gpgpu-sim/addrdec.h b/src/gpgpu-sim/addrdec.h index ba28c05..8315bc9 100644 --- a/src/gpgpu-sim/addrdec.h +++ b/src/gpgpu-sim/addrdec.h @@ -92,5 +92,7 @@ void addrdec_tlx(unsigned long long int addr, addrdec_t *tlx); void addrdec_setnchip(unsigned int nchips); void addrdec_setoption(option_parser_t opp); void addrdec_parseoption(const char *option); - +extern unsigned long long int addrdec_packbits(unsigned long long int mask, + unsigned long long int val, + unsigned char high, unsigned char low); #endif diff --git a/src/gpgpu-sim/dwf.h b/src/gpgpu-sim/dwf.h index 9771af5..75c06da 100644 --- a/src/gpgpu-sim/dwf.h +++ b/src/gpgpu-sim/dwf.h @@ -115,4 +115,7 @@ void dwf_set_accPC( int n_shaders, unsigned *acc_pc_count ); void dwf_update_statistics( int shader_id ); +extern unsigned int gpgpu_dwf_heuristic; +extern unsigned int gpgpu_dwf_regbk; + #endif diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc index 679d1d2..013ca54 100644 --- a/src/gpgpu-sim/gpu-cache.cc +++ b/src/gpgpu-sim/gpu-cache.cc @@ -67,6 +67,8 @@ #include "gpu-cache.h" #include "gpu-misc.h" #include "addrdec.h" +#include "stat-tool.h" +#include "gpu-sim.h" #include <assert.h> #include <string.h> @@ -141,19 +143,12 @@ void shd_cache_destroy( shd_cache_t* cp ) { free(cp); } -extern void shader_cache_miss_log( int logger_id, int type ); // hook up with shader core logger void shd_cache_bind_logger(shd_cache_t* cp, int core_id, int type_id) { cp->core_id = core_id; cp->type_id = type_id; } -extern unsigned long long int addrdec_packbits(unsigned long long int mask, - unsigned long long int val, - unsigned char high, unsigned char low); -extern void shader_cache_access_log( int logger_id, int type, int miss); -extern void shader_cache_access_unlog( int logger_id, int type, int miss); - shd_cache_line_t* shd_cache_access_internal( shd_cache_t *cp, unsigned long long int addr, unsigned int nbytes, @@ -211,7 +206,6 @@ shd_cache_line_t* shd_cache_access( shd_cache_t *cp, return shd_cache_access_internal(cp,addr,nbytes,write,sim_cycle,1/*this is a real access*/); } -extern int gpgpu_cache_wt_through; shd_cache_t *test = NULL; enum cache_request_status shd_cache_access_wb( shd_cache_t *cp, unsigned long long int addr, diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h index cdb3414..d07d1e1 100644 --- a/src/gpgpu-sim/gpu-cache.h +++ b/src/gpgpu-sim/gpu-cache.h @@ -186,6 +186,7 @@ unsigned long long int L2_shd_cache_fill( shd_cache_t *cp, unsigned int sim_cycle ); void shd_cache_print( shd_cache_t *cp, FILE *stream); - +float shd_cache_windowed_cache_miss_rate(shd_cache_t*, int); +void shd_cache_new_window(shd_cache_t*); #endif diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index f0646d2..b716acc 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -96,6 +96,8 @@ #include "../gpgpusim_entrypoint.h" #include "../cuda-sim/cuda-sim.h" +#include "mem_latency_stat.h" + #include <stdio.h> #include <string.h> #define MAX(a,b) (((a)>(b))?(a):(b)) @@ -146,17 +148,9 @@ unsigned int gpu_stall_by_MSHRwb = 0; //Note: it is accumulative for all shaders and is never reset //so it might increase 8 times in a cycle if we have 8 shaders unsigned int gpu_stall_sh2icnt = 0; -// performance counters to account for instruction distribution -extern unsigned int gpgpu_n_load_insn; -extern unsigned int gpgpu_n_store_insn; -extern unsigned int gpgpu_n_shmem_insn; -extern unsigned int gpgpu_n_tex_insn; -extern unsigned int gpgpu_n_const_insn; -extern unsigned int gpgpu_multi_unq_fetches; char *gpgpu_runtime_stat; int gpu_stat_sample_freq = 10000; int gpu_runtime_stat_flag = 0; -extern int gpgpu_warpdistro_shader; // GPGPU options unsigned long long gpu_max_cycle = 0; @@ -174,12 +168,10 @@ char *gpgpu_cache_texl1_opt; char *gpgpu_cache_constl1_opt; char *gpgpu_cache_dl1_opt; char *gpgpu_cache_dl2_opt; -extern int gpgpu_l2_readoverwrite; int gpgpu_partial_write_mask = 0; bool gpgpu_perfect_mem = false; char *gpgpu_shader_core_pipeline_opt; -extern unsigned int *requests_by_warp; unsigned int gpgpu_dram_buswidth = 4; unsigned int gpgpu_dram_burst_length = 4; int gpgpu_dram_sched_queue_size = 0; @@ -187,23 +179,14 @@ char * gpgpu_dram_timing_opt; int gpgpu_flush_cache = 0; int gpgpu_mem_address_mask = 0; unsigned int recent_dram_util = 0; - int gpgpu_cflog_interval = 0; - unsigned int finished_trace = 0; - unsigned g_next_request_uid = 1; - -extern struct regs_t regs; - -extern long int gpu_reads; - -void ptx_dump_regs( void *thd ); - int g_nthreads_issued; int g_total_cta_left; +void ptx_dump_regs( void *thd ); unsigned ptx_kernel_program_size(); void visualizer_printstat(); void time_vector_create(int ld_size,int st_size); @@ -213,9 +196,6 @@ void node_req_hist_clear(void *p); void node_req_hist_dump(void *p); void node_req_hist_update(void * p,int node, long long cycle); -/* functionally simulated memory */ -extern struct mem_t *mem; - /* Defining Clock Domains basically just the ratio is important */ @@ -252,56 +232,25 @@ unsigned int gpu_n_mshr_per_shader; unsigned int gpu_n_thread_per_shader = 128; unsigned int gpu_n_warp_per_shader; unsigned int gpu_n_mshr_per_thread = 1; - -extern int gpgpu_interwarp_mshr_merge ; - -extern unsigned int gpgpu_shmem_size; -extern unsigned int gpgpu_shader_registers; -extern unsigned int gpgpu_shader_cta; -extern int gpgpu_shmem_bkconflict; -extern int gpgpu_cache_bkconflict; -extern int gpgpu_n_cache_bank; -extern unsigned int warp_size; -extern int pipe_simd_width; -extern unsigned int gpgpu_dwf_heuristic; -extern unsigned int gpgpu_dwf_regbk; bool gpgpu_reg_bankconflict = false; -extern int gpgpu_shmem_port_per_bank; -extern int gpgpu_cache_port_per_bank; -extern int gpgpu_const_port_per_bank; -extern int gpgpu_shmem_pipe_speedup; -extern int gpgpu_reg_bank_conflict_model; -extern int gpgpu_reg_bank_use_warp_id; int gpgpu_operand_collector; -extern int gpgpu_operand_collector_num_units; -extern unsigned int gpgpu_num_reg_banks; - -extern unsigned int gpu_max_cta_per_shader; -extern unsigned int gpu_padded_cta_size; -extern int gpgpu_local_mem_map; - +int gpgpu_operand_collector_num_units = 4; unsigned int gpgpu_pre_mem_stages = 0; unsigned int gpgpu_no_divg_load = 0; char *gpgpu_dwf_hw_opt; unsigned int gpgpu_thread_swizzling = 0; unsigned int gpgpu_strict_simd_wrbk = 0; - int pdom_sched_type = 0; int n_pdom_sc_orig_stat = 0; //the selected pdom schedular is used int n_pdom_sc_single_stat = 0; //only a single warp is ready to go in that cycle. int *num_warps_issuable; int *num_warps_issuable_pershader; - -// Thread Dispatching Unit option int gpgpu_cuda_sim = 1; int gpgpu_spread_blocks_across_cores = 1; - -/* GPU uArch structures */ shader_core_ctx_t **sc; dram_t **dram; unsigned int common_clock = 0; unsigned int more_thread = 1; -extern unsigned int n_regconflict_stall; unsigned int warp_conflict_at_writeback = 0; unsigned int gpgpu_commit_pc_beyond_two = 0; int gpgpu_cache_wt_through = 0; @@ -331,18 +280,11 @@ unsigned ptx_sim_grid_size(); void icnt_init_grid(); void interconnect_stats(); void icnt_overal_stat(); - void gpu_sim_loop( int grid_num ); - void print_shader_cycle_distro( FILE *fout ) ; void find_reconvergence_points(); void dwf_process_reconv_pts(); -extern int gpgpu_ptx_instruction_classification ; -extern int g_ptx_sim_mode; - -extern int gpgpu_coalesce_arch; - #define CREATELOG 111 #define SAMPLELOG 222 #define DUMPLOG 333 @@ -874,12 +816,6 @@ unsigned int run_gpu_sim(int grid_num) return gpu_sim_cycle; } -extern void ** g_inst_classification_stat; -extern void ** g_inst_op_classification_stat; -extern int g_ptx_kernel_count; // used for classification stat collection purposes - -extern unsigned get_max_mshr_used(shader_core_ctx_t* shader); - void gpu_print_stat() { unsigned i; @@ -1160,8 +1096,6 @@ int issue_mf_from_fq(mem_fetch_t *mf){ return 0; } -extern void mshr_return_from_mem(shader_core_ctx_t * shader, mshr_entry_t* mshr); - inline void fill_shd_L1_with_new_line(shader_core_ctx_t * sc, mem_fetch_t * mf) { unsigned long long int repl_addr = -1; // When the data arrives, it flags all the appropriate MSHR diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h index 338336e..a69a3ef 100644 --- a/src/gpgpu-sim/gpu-sim.h +++ b/src/gpgpu-sim/gpu-sim.h @@ -148,6 +148,7 @@ extern unsigned int gpu_stall_by_MSHRwb; extern unsigned int gpu_stall_shd_mem; extern unsigned int gpu_stall_sh2icnt; extern int gpgpu_operand_collector; +extern int gpgpu_operand_collector_num_units; extern int gpu_runtime_stat_flag; extern unsigned int *max_return_queue_length; extern int gpgpu_partial_write_mask; @@ -168,5 +169,7 @@ extern unsigned int gpu_n_mem_per_ctrlr; extern unsigned int recent_dram_util; extern unsigned int **concurrent_row_access; //concurrent_row_access[dram chip id][bank id] extern unsigned long long gpu_tot_sim_insn; +extern unsigned int gpgpu_n_sent_writes; +extern unsigned int gpgpu_n_processed_writes; #endif diff --git a/src/gpgpu-sim/l2cache.cc b/src/gpgpu-sim/l2cache.cc index 48dcda1..e9f4780 100644 --- a/src/gpgpu-sim/l2cache.cc +++ b/src/gpgpu-sim/l2cache.cc @@ -51,8 +51,6 @@ extern int gpgpu_dram_sched_queue_size; extern unsigned made_write_mfs; extern unsigned freed_L1write_mfs; extern unsigned freed_L2write_mfs; -extern unsigned int gpgpu_n_sent_writes; -extern unsigned int gpgpu_n_processed_writes; extern unsigned g_next_request_uid; void memlatstat_icnt2sh_push(mem_fetch_t *mf); diff --git a/src/gpgpu-sim/l2cache.h b/src/gpgpu-sim/l2cache.h index 11bef11..d245408 100644 --- a/src/gpgpu-sim/l2cache.h +++ b/src/gpgpu-sim/l2cache.h @@ -50,3 +50,4 @@ extern unsigned L2_write_miss; extern unsigned L2_write_hit; extern unsigned L2_read_hit; extern unsigned L2_read_miss; +extern int gpgpu_l2_readoverwrite; diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index 6cafc48..bba2b8b 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -141,7 +141,6 @@ int gpgpu_shmem_pipe_speedup = 2; unsigned int gpu_max_cta_per_shader = 8; unsigned int gpu_padded_cta_size = 32; int gpgpu_local_mem_map = 1; -int gpgpu_operand_collector_num_units = 4; ///////////////////////////////////////////////////////////////////////////// /*-------------------------------------------------------------------------*/ @@ -468,8 +467,6 @@ int log2i(int n) { return lg; } -extern unsigned int gpu_n_warp_per_shader; - shader_core_ctx_t* shader_create( const char *name, int sid, unsigned int n_threads, unsigned int n_mshr, diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index 1d871d9..0a90225 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -897,5 +897,36 @@ unsigned int max_cta_per_shader( shader_core_ctx_t *shader); #define ID_OC 7 extern shader_core_ctx_t **sc; +extern unsigned int gpgpu_n_load_insn; +extern unsigned int gpgpu_n_store_insn; +extern unsigned int gpgpu_n_shmem_insn; +extern unsigned int gpgpu_n_tex_insn; +extern unsigned int gpgpu_n_const_insn; +extern unsigned int gpgpu_multi_unq_fetches; +extern unsigned int gpgpu_n_cache_bkconflict; +extern unsigned int gpgpu_n_shmem_bkconflict; +extern int gpgpu_warpdistro_shader; +extern unsigned int *shader_cycle_distro; +extern int gpgpu_interwarp_mshr_merge; +extern unsigned int gpgpu_shmem_size; +extern unsigned int gpgpu_shader_registers; +extern unsigned int gpgpu_shader_cta; +extern int gpgpu_shmem_bkconflict; +extern int gpgpu_cache_bkconflict; +extern int gpgpu_n_cache_bank; +extern int pipe_simd_width; +extern int gpgpu_shmem_port_per_bank; +extern int gpgpu_cache_port_per_bank; +extern int gpgpu_const_port_per_bank; +extern int gpgpu_shmem_pipe_speedup; +extern int gpgpu_reg_bank_conflict_model; +extern unsigned int gpgpu_num_reg_banks; +extern unsigned int gpu_max_cta_per_shader; +extern unsigned int gpu_padded_cta_size; +extern int gpgpu_local_mem_map; +extern unsigned int n_regconflict_stall; +extern int gpgpu_coalesce_arch; +extern unsigned get_max_mshr_used(shader_core_ctx_t* shader); +extern void mshr_return_from_mem(shader_core_ctx_t * shader, mshr_entry_t* mshr); #endif /* SHADER_H */ diff --git a/src/gpgpu-sim/stat-tool.h b/src/gpgpu-sim/stat-tool.h index 79de754..d67daf5 100644 --- a/src/gpgpu-sim/stat-tool.h +++ b/src/gpgpu-sim/stat-tool.h @@ -68,6 +68,7 @@ #include "../abstract_hardware_model.h" #include <stdio.h> +#include <zlib.h> void try_snap_shot (unsigned long long current_cycle); void set_spill_interval (unsigned long long interval); @@ -80,7 +81,7 @@ void cflog_snapshot( int logger_id, unsigned long long cycle ); void cflog_print(FILE *fout); void cflog_print_path_expression(FILE *fout); void cflog_visualizer_print(FILE *fout); - +void cflog_visualizer_gzprint(gzFile fout); void insn_warp_occ_create( int n_loggers, int simd_width, int n_insn ); void insn_warp_occ_log( int logger_id, address_type pc, int warp_occ ); @@ -120,5 +121,6 @@ void shader_CTA_count_unlog( int shader_id, int nCTAdone ); void shader_CTA_count_resetnow( ); void shader_CTA_count_print( FILE *fout ); void shader_CTA_count_visualizer_print( FILE *fout ); +void shader_CTA_count_visualizer_gzprint(gzFile fout); #endif /* CFLOGGER_H */ diff --git a/src/gpgpu-sim/visualizer.cc b/src/gpgpu-sim/visualizer.cc index 6eec3be..4ed8157 100644 --- a/src/gpgpu-sim/visualizer.cc +++ b/src/gpgpu-sim/visualizer.cc @@ -67,32 +67,14 @@ #include "../option_parser.h" #include "mem_latency_stat.h" #include "stat-tool.h" +#include "gpu-cache.h" #include <time.h> #include <string.h> #include <zlib.h> -extern unsigned int gpu_mem_n_bk; -extern unsigned long long int mf_total_lat; -extern unsigned num_mfs; -extern unsigned long long gpu_tot_sim_insn; -extern unsigned int gpgpu_n_sent_writes; -extern unsigned int gpgpu_n_processed_writes; -extern unsigned int gpgpu_n_cache_bkconflict; -extern unsigned int gpgpu_n_shmem_bkconflict; -extern unsigned int *max_return_queue_length; -extern int gpgpu_warpdistro_shader; -extern unsigned ***mem_access_type_stats; - -extern unsigned int warp_size; -extern unsigned int *shader_cycle_distro; - static void time_vector_print_interval2file(FILE *outfile); static void time_vector_print_interval2gzfile(gzFile outfile); -void cflog_visualizer_gzprint(gzFile fout); -void shader_CTA_count_visualizer_gzprint(gzFile fout); -float shd_cache_windowed_cache_miss_rate(shd_cache_t*, int); -void shd_cache_new_window(shd_cache_t*); int g_visualizer_enabled = 1; char *g_visualizer_filename = NULL; diff --git a/src/gpgpu-sim/warp_tracker.cc b/src/gpgpu-sim/warp_tracker.cc index 138011c..2096d93 100644 --- a/src/gpgpu-sim/warp_tracker.cc +++ b/src/gpgpu-sim/warp_tracker.cc @@ -65,12 +65,10 @@ #include "warp_tracker.h" #include "gpu-sim.h" +#include "shader.h" using namespace std; -extern unsigned int warp_size; -extern unsigned int gpu_n_shader; - #include <set> class warp_tracker { @@ -415,9 +413,6 @@ void free_commit_warp( int *commit_warp ) free_commit_warp_q.push(commit_warp); } - -extern int pipe_simd_width; - // uncomment to enable checking for warp consistency // #define CHECK_WARP_CONSISTENCY diff --git a/src/intersim/interconnect_interface.cpp b/src/intersim/interconnect_interface.cpp index 34fd39d..737e61e 100644 --- a/src/intersim/interconnect_interface.cpp +++ b/src/intersim/interconnect_interface.cpp @@ -18,10 +18,10 @@ #include "interconnect_interface.h" #include "../gpgpu-sim/mem_fetch.h" #include "../gpgpu-sim/gpu-sim.h" +#include "../gpgpu-sim/shader.h" #include <string.h> int _flit_size ; -extern unsigned int warp_size; bool doub_net = false; //double networks disabled by default |
