diff options
| author | JRPAN <[email protected]> | 2021-05-17 17:35:06 -0400 |
|---|---|---|
| committer | JRPAN <[email protected]> | 2021-05-18 19:54:39 -0400 |
| commit | f7833519471ce92619bd1e4807ec07eb55aed76e (patch) | |
| tree | 0a6a5a3cc523ff02c22142be667e1155a8e49487 /src | |
| parent | 585dcf5dc05d6343314600114ebcea8c719e7423 (diff) | |
new configs - adaptive cache and cache write ratio
Diffstat (limited to 'src')
| -rw-r--r-- | src/abstract_hardware_model.h | 2 | ||||
| -rw-r--r-- | src/gpgpu-sim/gpu-cache.h | 5 | ||||
| -rw-r--r-- | src/gpgpu-sim/gpu-sim.cc | 7 |
3 files changed, 14 insertions, 0 deletions
diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h index 982e416..e796571 100644 --- a/src/abstract_hardware_model.h +++ b/src/abstract_hardware_model.h @@ -373,6 +373,8 @@ class core_config { } unsigned mem_warp_parts; mutable unsigned gpgpu_shmem_size; + char *gpgpu_shmem_option; + unsigned gpgpu_unified_l1d_size; unsigned gpgpu_shmem_sizeDefault; unsigned gpgpu_shmem_sizePrefL1; unsigned gpgpu_shmem_sizePrefShared; diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h index 00c09ae..ccc935b 100644 --- a/src/gpgpu-sim/gpu-cache.h +++ b/src/gpgpu-sim/gpu-cache.h @@ -491,6 +491,7 @@ class cache_config { m_data_port_width = 0; m_set_index_function = LINEAR_SET_FUNCTION; m_is_streaming = false; + m_wr_percent = 0; } void init(char *config, FuncCache status) { cache_status = status; @@ -754,6 +755,10 @@ class cache_config { char *m_config_stringPrefL1; char *m_config_stringPrefShared; FuncCache cache_status; + unsigned m_wr_percent; + write_allocate_policy_t get_write_allocate_policy() { + return m_write_alloc_policy; + } protected: void exit_parse_error() { diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index fd36e00..bd09cdb 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -249,6 +249,7 @@ void shader_core_config::reg_options(class OptionParser *opp) { " {<nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_" "alloc>,<mshr>:<N>:<merge>,<mq> | none}", "none"); + option_parser_register(opp,"-gpgpu_cache_write_ratio",OPT_UINT32,&m_L1D_config.m_wr_percent,"L1D write ratio","0"); option_parser_register(opp, "-gpgpu_l1_banks", OPT_UINT32, &m_L1D_config.l1_banks, "The number of L1 cache banks", "1"); @@ -326,6 +327,12 @@ void shader_core_config::reg_options(class OptionParser *opp) { option_parser_register( opp, "-gpgpu_shmem_size", OPT_UINT32, &gpgpu_shmem_size, "Size of shared memory per shader core (default 16kB)", "16384"); + option_parser_register( + opp, "-gpgpu_shmem_option", OPT_CSTR, &gpgpu_shmem_option, + "Option list of shared memory sizes", "0"); + option_parser_register( + opp, "-gpgpu_unified_l1d_size", OPT_UINT32, &gpgpu_unified_l1d_size, + "Size of unified data cache(L1D + shared memory) in KB", "0"); option_parser_register(opp, "-gpgpu_adaptive_cache_config", OPT_BOOL, &adaptive_cache_config, "adaptive_cache_config", "0"); option_parser_register( |