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authorTor Aamodt <[email protected]>2010-07-29 22:02:01 -0800
committerTor Aamodt <[email protected]>2010-07-29 22:02:01 -0800
commitfcb7e0b302639ef4bca589b43d8a57d2dec623e5 (patch)
tree37d695acd66030d0151a7f4056591f5c9d72a1f8 /src
parent503cda930217158d43d136aea1893f0d30df32a6 (diff)
compiling (not operand collector probably won't work for anything using tex instructions currently)
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7106]
Diffstat (limited to 'src')
-rw-r--r--src/gpgpu-sim/gpu-sim.cc3
-rw-r--r--src/gpgpu-sim/shader.cc4
-rw-r--r--src/gpgpu-sim/shader.h3
3 files changed, 5 insertions, 5 deletions
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 5615801..9d17806 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -264,11 +264,10 @@ extern int gpgpu_cache_port_per_bank;
extern int gpgpu_const_port_per_bank;
extern int gpgpu_shmem_pipe_speedup;
extern int gpgpu_reg_bank_conflict_model;
-extern unsigned int gpgpu_num_reg_banks;
extern int gpgpu_reg_bank_use_warp_id;
extern int gpgpu_operand_collector;
extern int gpgpu_operand_collector_num_units;
-extern int gpgpu_num_reg_banks;
+extern unsigned int gpgpu_num_reg_banks;
extern unsigned int gpu_max_cta_per_shader;
extern unsigned int gpu_padded_cta_size;
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index 8ebf655..d3780a8 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -125,6 +125,7 @@ extern int gpgpu_cflog_interval;
extern unsigned int gpu_stall_by_MSHRwb;
extern unsigned int gpu_stall_shd_mem;
extern unsigned int gpu_stall_sh2icnt;
+extern int gpgpu_operand_collector;
enum mem_stage_access_type {
C_MEM,
@@ -520,7 +521,7 @@ inst_t create_nop_inst() // just because C++ does not have designated initialize
nop_inst.id_cycle = 0;
nop_inst.ex_cycle = 0;
nop_inst.mm_cycle = 0;
- nop_inst.space = 0;
+ nop_inst.space = memory_space_t();
return nop_inst;
}
@@ -634,7 +635,6 @@ shader_core_ctx_t* shader_create( const char *name, int sid,
}
}
}
- sc->last_cta_finished = 0;
sc->n_threads = n_threads;
sc->thread = (thread_ctx_t*) calloc(sizeof(thread_ctx_t), n_threads);
sc->not_completed = 0;
diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h
index 702046d..9f64da5 100644
--- a/src/gpgpu-sim/shader.h
+++ b/src/gpgpu-sim/shader.h
@@ -885,7 +885,7 @@ void shader_print_l1_miss_stat( FILE *fout );
//based on on the current kernel's CTA size and is 1 if mutiple CTA per block is not supported
unsigned int max_cta_per_shader( shader_core_ctx_t *shader);
-#define N_PIPELINE_STAGES 7
+#define N_PIPELINE_STAGES (gpgpu_operand_collector ? 8 : 7)
#define TS_IF 0
#define IF_ID 1
#define ID_RR 2
@@ -894,6 +894,7 @@ unsigned int max_cta_per_shader( shader_core_ctx_t *shader);
#define EX_MM 4
#define MM_WB 5
#define WB_RT 6
+#define ID_OC 7
#endif /* SHADER_H */