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-rw-r--r--configs/PascalTitanX/gpgpu-sim-3.x/gpgpusim.config4
1 files changed, 2 insertions, 2 deletions
diff --git a/configs/PascalTitanX/gpgpu-sim-3.x/gpgpusim.config b/configs/PascalTitanX/gpgpu-sim-3.x/gpgpusim.config
index 2f09ab6..7dfd6d5 100644
--- a/configs/PascalTitanX/gpgpu-sim-3.x/gpgpusim.config
+++ b/configs/PascalTitanX/gpgpu-sim-3.x/gpgpusim.config
@@ -36,8 +36,8 @@
## Pascal GP102 has 4 SP SIMD units and 4 SFU units
## we need to scale the number of pipeline registers to be equal to the number of SP units
-gpgpu_pipeline_widths 2,1,2,1,2,1,2,1,5
--gpgpu_num_sp_units 2
--gpgpu_num_sfu_units 2
+-gpgpu_num_sp_units 4
+-gpgpu_num_sfu_units 4
-gpgpu_num_dp_units 1
# Instruction latencies and initiation intervals