diff options
| -rw-r--r-- | src/gpgpu-sim/gpu-cache.h | 3 | ||||
| -rw-r--r-- | src/gpgpu-sim/shader.cc | 5 |
2 files changed, 2 insertions, 6 deletions
diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h index 75dce40..d801528 100644 --- a/src/gpgpu-sim/gpu-cache.h +++ b/src/gpgpu-sim/gpu-cache.h @@ -841,8 +841,8 @@ class cache_config { char *m_config_stringPrefL1; char *m_config_stringPrefShared; FuncCache cache_status; - unsigned m_wr_percent; unsigned m_unified_cache_size; + unsigned m_wr_percent; write_allocate_policy_t get_write_allocate_policy() { return m_write_alloc_policy; } @@ -897,7 +897,6 @@ class cache_config { unsigned m_data_port_width; //< number of byte the cache can access per cycle enum set_index_function m_set_index_function; // Hash, linear, or custom set index function - unsigned m_wr_percent; friend class tag_array; friend class baseline_cache; diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index db53fca..75fbe16 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -3391,13 +3391,12 @@ unsigned int shader_core_config::max_cta(const kernel_info_t &k) const { assert(0); } -<<<<<<< HEAD if(m_L1D_config.is_streaming()) { //for streaming cache, if the whole memory is allocated //to the L1 cache, then make the allocation to be on_MISS //otherwise, make it ON_FILL to eliminate line allocation fails //i.e. MSHR throughput is the same, independent on the L1 cache size/associativity - if(total_shmed == 0) { + if(total_shmem == 0) { m_L1D_config.set_allocation_policy(ON_MISS); printf("GPGPU-Sim: Reconfigure L1 allocation to ON_MISS\n"); } @@ -3406,10 +3405,8 @@ unsigned int shader_core_config::max_cta(const kernel_info_t &k) const { printf("GPGPU-Sim: Reconfigure L1 allocation to ON_FILL\n"); } } -======= printf("GPGPU-Sim: Reconfigure L1 cache to %uKB\n", m_L1D_config.get_total_size_inKB()); ->>>>>>> 2b2b6a2916e4ed833c707be887bf927167a71fa6 k.cache_config_set = true; } |