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-rw-r--r--src/gpgpu-sim/shader.cc75
-rw-r--r--src/gpgpu-sim/shader.h87
2 files changed, 80 insertions, 82 deletions
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index cb1c7a9..f57cae0 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -1222,29 +1222,29 @@ void sfu::issue( register_set& source_reg )
//m_core->incexecstat((*ready_reg));
(*ready_reg)->op4=SFU__OP;
- m_core->incsfu_stat(m_core->get_sid(),m_core->get_config()->warp_size,(*ready_reg)->latency);
+ m_core->incsfu_stat(m_core->get_config()->warp_size,(*ready_reg)->latency);
pipelined_simd_unit::issue(source_reg);
}
void ldst_unit::active_lanes_in_pipeline(){
unsigned active_count=pipelined_simd_unit::get_active_lanes_in_pipeline();
assert(active_count<=m_core->get_config()->warp_size);
- m_core->incfumemactivelanes_stat(m_core->get_sid(),active_count);
+ m_core->incfumemactivelanes_stat(active_count);
}
void sp_unit::active_lanes_in_pipeline(){
unsigned active_count=pipelined_simd_unit::get_active_lanes_in_pipeline();
assert(active_count<=m_core->get_config()->warp_size);
- m_core->incspactivelanes_stat(m_core->get_sid(),active_count);
- m_core->incfuactivelanes_stat(m_core->get_sid(),active_count);
- m_core->incfumemactivelanes_stat(m_core->get_sid(),active_count);
+ m_core->incspactivelanes_stat(active_count);
+ m_core->incfuactivelanes_stat(active_count);
+ m_core->incfumemactivelanes_stat(active_count);
}
void sfu::active_lanes_in_pipeline(){
unsigned active_count=pipelined_simd_unit::get_active_lanes_in_pipeline();
assert(active_count<=m_core->get_config()->warp_size);
- m_core->incsfuactivelanes_stat(m_core->get_sid(),active_count);
- m_core->incfuactivelanes_stat(m_core->get_sid(),active_count);
- m_core->incfumemactivelanes_stat(m_core->get_sid(),active_count);
+ m_core->incsfuactivelanes_stat(active_count);
+ m_core->incfuactivelanes_stat(active_count);
+ m_core->incfumemactivelanes_stat(active_count);
}
sp_unit::sp_unit( register_set* result_port, const shader_core_config *config,shader_core_ctx *core)
@@ -1258,7 +1258,7 @@ void sp_unit :: issue(register_set& source_reg)
warp_inst_t** ready_reg = source_reg.get_ready();
//m_core->incexecstat((*ready_reg));
(*ready_reg)->op4=SP__OP;
- m_core->incsp_stat(m_core->get_sid(),m_core->get_config()->warp_size,(*ready_reg)->latency);
+ m_core->incsp_stat(m_core->get_config()->warp_size,(*ready_reg)->latency);
pipelined_simd_unit::issue(source_reg);
}
@@ -1357,7 +1357,7 @@ void ldst_unit:: issue( register_set &reg_set )
inst->op4=MEM__OP;
m_core->mem_instruction_stats(*inst);
- m_core->incmem_stat(m_core->get_sid(),m_core->get_config()->warp_size,1);
+ m_core->incmem_stat(m_core->get_config()->warp_size,1);
pipelined_simd_unit::issue(reg_set);
}
@@ -1578,7 +1578,6 @@ void ldst_unit::cycle()
} else {
// stores exit pipeline here
m_core->dec_inst_in_pipeline(warp_id);
- m_core->get_gpu()->gpu_sim_insn += m_dispatch_reg->active_count();
m_core->warp_inst_complete(*m_dispatch_reg);
m_dispatch_reg->clear();
}
@@ -1717,70 +1716,70 @@ void warp_inst_t::print( FILE *fout ) const
void shader_core_ctx::incexecstat(warp_inst_t *&inst)
{
if(inst->op5==TEX)
- inctex_stat(get_sid(),inst->active_count(),1);
+ inctex_stat(inst->active_count(),1);
switch(inst->op3){
case INT__OP:
- incialu_stat(get_sid(),inst->active_count(),25);
+ incialu_stat(inst->active_count(),25);
break;
case INT_MUL_OP:
if(m_config->gpgpu_shader_registers==32768) //i.e. FERMI
- incimul_stat(get_sid(),inst->active_count(),7.2);
+ incimul_stat(inst->active_count(),7.2);
else
- incimul_stat(get_sid(),inst->active_count(),16);
+ incimul_stat(inst->active_count(),16);
break;
case INT_MUL24_OP:
- incimul24_stat(get_sid(),inst->active_count(),4.2);
+ incimul24_stat(inst->active_count(),4.2);
break;
case INT_MUL32_OP:
- incimul32_stat(get_sid(),inst->active_count(),4);
+ incimul32_stat(inst->active_count(),4);
break;
case INT_DIV_OP:
- incidiv_stat(get_sid(),inst->active_count(),40);
+ incidiv_stat(inst->active_count(),40);
break;
case FP__OP:
if(m_config->gpgpu_shader_registers==32768)
- incfpalu_stat(get_sid(),inst->active_count(),1);
+ incfpalu_stat(inst->active_count(),1);
else
- incfpalu_stat(get_sid(),inst->active_count(),1.7);
+ incfpalu_stat(inst->active_count(),1.7);
break;
case FP_MUL_OP:
if(m_config->gpgpu_shader_registers==32768)
- incfpmul_stat(get_sid(),inst->active_count(),1.8);
+ incfpmul_stat(inst->active_count(),1.8);
else
- incfpmul_stat(get_sid(),inst->active_count(),1.8);
+ incfpmul_stat(inst->active_count(),1.8);
break;
case FP_DIV_OP:
if(m_config->gpgpu_shader_registers==32768)
- incfpdiv_stat(get_sid(),inst->active_count(),48);
+ incfpdiv_stat(inst->active_count(),48);
else
- incfpdiv_stat(get_sid(),inst->active_count(),22);
+ incfpdiv_stat(inst->active_count(),22);
break;
case FP_SQRT_OP:
if(m_config->gpgpu_shader_registers==32768)
- inctrans_stat(get_sid(),inst->active_count(),25);
+ inctrans_stat(inst->active_count(),25);
else
- inctrans_stat(get_sid(),inst->active_count(),8);
+ inctrans_stat(inst->active_count(),8);
break;
case FP_LG_OP:
if (m_config->gpgpu_shader_registers==32768)
- inctrans_stat(get_sid(),inst->active_count(),35);
+ inctrans_stat(inst->active_count(),35);
else
- inctrans_stat(get_sid(),inst->active_count(),0.3);
+ inctrans_stat(inst->active_count(),0.3);
break;
case FP_SIN_OP:
if(m_config->gpgpu_shader_registers==32768)
- inctrans_stat(get_sid(),inst->active_count(),12);
+ inctrans_stat(inst->active_count(),12);
else
- inctrans_stat(get_sid(),inst->active_count(),40);
+ inctrans_stat(inst->active_count(),40);
break;
case FP_EXP_OP:
if(m_config->gpgpu_shader_registers==32768)
- inctrans_stat(get_sid(),inst->active_count(),35);
+ inctrans_stat(inst->active_count(),35);
else
- inctrans_stat(get_sid(),inst->active_count(),9);
+ inctrans_stat(inst->active_count(),9);
break;
@@ -2484,9 +2483,9 @@ bool opndcoll_rfu_t::writeback( const warp_inst_t &inst )
}
}
}
- m_shader->incregfile_writes(m_shader->get_sid(),active_count);
+ m_shader->incregfile_writes(active_count);
}else{
- m_shader->incregfile_writes(m_shader->get_sid(),m_shader->get_config()->warp_size);//inst.active_count());
+ m_shader->incregfile_writes(m_shader->get_config()->warp_size);//inst.active_count());
}
}
return true;
@@ -2509,9 +2508,9 @@ void opndcoll_rfu_t::dispatch_ready_cu()
}
}
}
- m_shader->incnon_rf_operands(m_shader->get_sid(),active_count);
+ m_shader->incnon_rf_operands(active_count);
}else{
- m_shader->incnon_rf_operands(m_shader->get_sid(),m_shader->get_config()->warp_size);//cu->get_active_count());
+ m_shader->incnon_rf_operands(m_shader->get_config()->warp_size);//cu->get_active_count());
}
}
cu->dispatch();
@@ -2572,9 +2571,9 @@ void opndcoll_rfu_t::allocate_reads()
}
}
}
- m_shader->incregfile_reads(m_shader->get_sid(),active_count);
+ m_shader->incregfile_reads(active_count);
}else{
- m_shader->incregfile_reads(m_shader->get_sid(),m_shader->get_config()->warp_size);//op.get_active_count());
+ m_shader->incregfile_reads(m_shader->get_config()->warp_size);//op.get_active_count());
}
}
}
diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h
index d7ba018..0efb659 100644
--- a/src/gpgpu-sim/shader.h
+++ b/src/gpgpu-sim/shader.h
@@ -1091,7 +1091,6 @@ struct shader_core_config : public core_config
cache_config m_L1T_config;
cache_config m_L1C_config;
cache_config m_L1D_config;
- cache_config m_L2D_config;
bool gpgpu_dwf_reg_bankconflict;
@@ -1414,106 +1413,106 @@ public:
void display_simt_state(FILE *fout, int mask ) const;
void display_pipeline( FILE *fout, int print_mem, int mask3bit ) const;
- void incload_stat(unsigned sid) {m_stats->m_num_loadqueued_insn[sid]++;}
- void incstore_stat(unsigned sid) {m_stats->m_num_storequeued_insn[sid]++;}
- void incialu_stat(unsigned sid,unsigned active_count,double latency) {
+ void incload_stat() {m_stats->m_num_loadqueued_insn[m_sid]++;}
+ void incstore_stat() {m_stats->m_num_storequeued_insn[m_sid]++;}
+ void incialu_stat(unsigned active_count,double latency) {
if(m_config->gpgpu_clock_gated_lanes==false){
- m_stats->m_num_ialu_acesses[sid]=m_stats->m_num_ialu_acesses[sid]+active_count*latency
+ m_stats->m_num_ialu_acesses[m_sid]=m_stats->m_num_ialu_acesses[m_sid]+active_count*latency
+ inactive_lanes_accesses_nonsfu(active_count, latency);
}else {
- m_stats->m_num_ialu_acesses[sid]=m_stats->m_num_ialu_acesses[sid]+active_count*latency;
+ m_stats->m_num_ialu_acesses[m_sid]=m_stats->m_num_ialu_acesses[m_sid]+active_count*latency;
}
}
- void inctex_stat(unsigned sid,unsigned active_count,double latency){
- m_stats->m_num_tex_inst[sid]=m_stats->m_num_tex_inst[sid]+active_count*latency;
+ void inctex_stat(unsigned active_count,double latency){
+ m_stats->m_num_tex_inst[m_sid]=m_stats->m_num_tex_inst[m_sid]+active_count*latency;
}
- void incimul_stat(unsigned sid,unsigned active_count,double latency) {
+ void incimul_stat(unsigned active_count,double latency) {
if(m_config->gpgpu_clock_gated_lanes==false){
- m_stats->m_num_imul_acesses[sid]=m_stats->m_num_imul_acesses[sid]+active_count*latency
+ m_stats->m_num_imul_acesses[m_sid]=m_stats->m_num_imul_acesses[m_sid]+active_count*latency
+ inactive_lanes_accesses_nonsfu(active_count, latency);
}else {
- m_stats->m_num_imul_acesses[sid]=m_stats->m_num_imul_acesses[sid]+active_count*latency;
+ m_stats->m_num_imul_acesses[m_sid]=m_stats->m_num_imul_acesses[m_sid]+active_count*latency;
}
}
- void incimul24_stat(unsigned sid,unsigned active_count,double latency) {
+ void incimul24_stat(unsigned active_count,double latency) {
if(m_config->gpgpu_clock_gated_lanes==false){
- m_stats->m_num_imul24_acesses[sid]=m_stats->m_num_imul24_acesses[sid]+active_count*latency
+ m_stats->m_num_imul24_acesses[m_sid]=m_stats->m_num_imul24_acesses[m_sid]+active_count*latency
+ inactive_lanes_accesses_nonsfu(active_count, latency);
}else {
- m_stats->m_num_imul24_acesses[sid]=m_stats->m_num_imul24_acesses[sid]+active_count*latency;
+ m_stats->m_num_imul24_acesses[m_sid]=m_stats->m_num_imul24_acesses[m_sid]+active_count*latency;
}
}
- void incimul32_stat(unsigned sid,unsigned active_count,double latency) {
+ void incimul32_stat(unsigned active_count,double latency) {
if(m_config->gpgpu_clock_gated_lanes==false){
- m_stats->m_num_imul32_acesses[sid]=m_stats->m_num_imul32_acesses[sid]+active_count*latency
+ m_stats->m_num_imul32_acesses[m_sid]=m_stats->m_num_imul32_acesses[m_sid]+active_count*latency
+ inactive_lanes_accesses_sfu(active_count, latency);
}else{
- m_stats->m_num_imul32_acesses[sid]=m_stats->m_num_imul32_acesses[sid]+active_count*latency;
+ m_stats->m_num_imul32_acesses[m_sid]=m_stats->m_num_imul32_acesses[m_sid]+active_count*latency;
}
//printf("Int_Mul -- Active_count: %d\n",active_count);
}
- void incidiv_stat(unsigned sid,unsigned active_count,double latency) {
+ void incidiv_stat(unsigned active_count,double latency) {
if(m_config->gpgpu_clock_gated_lanes==false){
- m_stats->m_num_idiv_acesses[sid]=m_stats->m_num_idiv_acesses[sid]+active_count*latency
+ m_stats->m_num_idiv_acesses[m_sid]=m_stats->m_num_idiv_acesses[m_sid]+active_count*latency
+ inactive_lanes_accesses_sfu(active_count, latency);
}else {
- m_stats->m_num_idiv_acesses[sid]=m_stats->m_num_idiv_acesses[sid]+active_count*latency;
+ m_stats->m_num_idiv_acesses[m_sid]=m_stats->m_num_idiv_acesses[m_sid]+active_count*latency;
}
}
- void incfpalu_stat(unsigned sid,unsigned active_count,double latency) {
+ void incfpalu_stat(unsigned active_count,double latency) {
if(m_config->gpgpu_clock_gated_lanes==false){
- m_stats->m_num_fp_acesses[sid]=m_stats->m_num_fp_acesses[sid]+active_count*latency
+ m_stats->m_num_fp_acesses[m_sid]=m_stats->m_num_fp_acesses[m_sid]+active_count*latency
+ inactive_lanes_accesses_nonsfu(active_count, latency);
}else {
- m_stats->m_num_fp_acesses[sid]=m_stats->m_num_fp_acesses[sid]+active_count*latency;
+ m_stats->m_num_fp_acesses[m_sid]=m_stats->m_num_fp_acesses[m_sid]+active_count*latency;
}
}
- void incfpmul_stat(unsigned sid,unsigned active_count,double latency) {
+ void incfpmul_stat(unsigned active_count,double latency) {
// printf("FP MUL stat increament\n");
if(m_config->gpgpu_clock_gated_lanes==false){
- m_stats->m_num_fpmul_acesses[sid]=m_stats->m_num_fpmul_acesses[sid]+active_count*latency
+ m_stats->m_num_fpmul_acesses[m_sid]=m_stats->m_num_fpmul_acesses[m_sid]+active_count*latency
+ inactive_lanes_accesses_nonsfu(active_count, latency);
}else {
- m_stats->m_num_fpmul_acesses[sid]=m_stats->m_num_fpmul_acesses[sid]+active_count*latency;
+ m_stats->m_num_fpmul_acesses[m_sid]=m_stats->m_num_fpmul_acesses[m_sid]+active_count*latency;
}
}
- void incfpdiv_stat(unsigned sid,unsigned active_count,double latency) {
+ void incfpdiv_stat(unsigned active_count,double latency) {
if(m_config->gpgpu_clock_gated_lanes==false){
- m_stats->m_num_fpdiv_acesses[sid]=m_stats->m_num_fpdiv_acesses[sid]+active_count*latency
+ m_stats->m_num_fpdiv_acesses[m_sid]=m_stats->m_num_fpdiv_acesses[m_sid]+active_count*latency
+ inactive_lanes_accesses_sfu(active_count, latency);
}else {
- m_stats->m_num_fpdiv_acesses[sid]=m_stats->m_num_fpdiv_acesses[sid]+active_count*latency;
+ m_stats->m_num_fpdiv_acesses[m_sid]=m_stats->m_num_fpdiv_acesses[m_sid]+active_count*latency;
}
}
- void inctrans_stat(unsigned sid,unsigned active_count,double latency) {
+ void inctrans_stat(unsigned active_count,double latency) {
if(m_config->gpgpu_clock_gated_lanes==false){
- m_stats->m_num_trans_acesses[sid]=m_stats->m_num_trans_acesses[sid]+active_count*latency
+ m_stats->m_num_trans_acesses[m_sid]=m_stats->m_num_trans_acesses[m_sid]+active_count*latency
+ inactive_lanes_accesses_sfu(active_count, latency);
}else{
- m_stats->m_num_trans_acesses[sid]=m_stats->m_num_trans_acesses[sid]+active_count*latency;
+ m_stats->m_num_trans_acesses[m_sid]=m_stats->m_num_trans_acesses[m_sid]+active_count*latency;
}
}
- void incsfu_stat(unsigned sid,unsigned active_count,double latency) {m_stats->m_num_sfu_acesses[sid]=m_stats->m_num_sfu_acesses[sid]+active_count*latency;}
- void incsp_stat(unsigned sid,unsigned active_count,double latency) {m_stats->m_num_sp_acesses[sid]=m_stats->m_num_sp_acesses[sid]+active_count*latency;}
- void incmem_stat(unsigned sid,unsigned active_count,double latency) {
+ void incsfu_stat(unsigned active_count,double latency) {m_stats->m_num_sfu_acesses[m_sid]=m_stats->m_num_sfu_acesses[m_sid]+active_count*latency;}
+ void incsp_stat(unsigned active_count,double latency) {m_stats->m_num_sp_acesses[m_sid]=m_stats->m_num_sp_acesses[m_sid]+active_count*latency;}
+ void incmem_stat(unsigned active_count,double latency) {
if(m_config->gpgpu_clock_gated_lanes==false){
- m_stats->m_num_mem_acesses[sid]=m_stats->m_num_mem_acesses[sid]+active_count*latency
+ m_stats->m_num_mem_acesses[m_sid]=m_stats->m_num_mem_acesses[m_sid]+active_count*latency
+ inactive_lanes_accesses_nonsfu(active_count, latency);
}else {
- m_stats->m_num_mem_acesses[sid]=m_stats->m_num_mem_acesses[sid]+active_count*latency;
+ m_stats->m_num_mem_acesses[m_sid]=m_stats->m_num_mem_acesses[m_sid]+active_count*latency;
}
}
void incexecstat(warp_inst_t *&inst);
- void incregfile_reads(unsigned sid,unsigned active_count) {m_stats->m_read_regfile_acesses[sid]=m_stats->m_read_regfile_acesses[sid]+active_count;}
- void incregfile_writes(unsigned sid,unsigned active_count){m_stats->m_write_regfile_acesses[sid]=m_stats->m_write_regfile_acesses[sid]+active_count;}
- void incnon_rf_operands(unsigned sid,unsigned active_count){m_stats->m_non_rf_operands[sid]=m_stats->m_non_rf_operands[sid]+active_count;}
+ void incregfile_reads(unsigned active_count) {m_stats->m_read_regfile_acesses[m_sid]=m_stats->m_read_regfile_acesses[m_sid]+active_count;}
+ void incregfile_writes(unsigned active_count){m_stats->m_write_regfile_acesses[m_sid]=m_stats->m_write_regfile_acesses[m_sid]+active_count;}
+ void incnon_rf_operands(unsigned active_count){m_stats->m_non_rf_operands[m_sid]=m_stats->m_non_rf_operands[m_sid]+active_count;}
- void incspactivelanes_stat(unsigned sid,unsigned active_count) {m_stats->m_active_sp_lanes[sid]=m_stats->m_active_sp_lanes[sid]+active_count;}
- void incsfuactivelanes_stat(unsigned sid,unsigned active_count) {m_stats->m_active_sfu_lanes[sid]=m_stats->m_active_sfu_lanes[sid]+active_count;}
- void incfuactivelanes_stat(unsigned sid,unsigned active_count) {m_stats->m_active_fu_lanes[sid]=m_stats->m_active_fu_lanes[sid]+active_count;}
- void incfumemactivelanes_stat(unsigned sid,unsigned active_count) {m_stats->m_active_fu_mem_lanes[sid]=m_stats->m_active_fu_mem_lanes[sid]+active_count;}
+ void incspactivelanes_stat(unsigned active_count) {m_stats->m_active_sp_lanes[m_sid]=m_stats->m_active_sp_lanes[m_sid]+active_count;}
+ void incsfuactivelanes_stat(unsigned active_count) {m_stats->m_active_sfu_lanes[m_sid]=m_stats->m_active_sfu_lanes[m_sid]+active_count;}
+ void incfuactivelanes_stat(unsigned active_count) {m_stats->m_active_fu_lanes[m_sid]=m_stats->m_active_fu_lanes[m_sid]+active_count;}
+ void incfumemactivelanes_stat(unsigned active_count) {m_stats->m_active_fu_mem_lanes[m_sid]=m_stats->m_active_fu_mem_lanes[m_sid]+active_count;}
private:
unsigned inactive_lanes_accesses_sfu(unsigned active_count,double latency){
return ( ((32-active_count)>>1)*latency) + ( ((32-active_count)>>3)*latency) + ( ((32-active_count)>>3)*latency);