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-rw-r--r--libcuda/cuda_runtime_api.cc8
-rw-r--r--src/abstract_hardware_model.h6
-rw-r--r--src/cuda-sim/cuda-sim.cc22
-rw-r--r--src/cuda-sim/instructions.cc14
-rw-r--r--src/cuda-sim/ptx_parser.cc2
-rw-r--r--src/gpgpu-sim/scoreboard.cc42
-rw-r--r--src/gpgpu-sim/shader.cc18
7 files changed, 59 insertions, 53 deletions
diff --git a/libcuda/cuda_runtime_api.cc b/libcuda/cuda_runtime_api.cc
index a79e740..d67fd85 100644
--- a/libcuda/cuda_runtime_api.cc
+++ b/libcuda/cuda_runtime_api.cc
@@ -986,7 +986,6 @@ __host__ cudaError_t CUDARTAPI cudaLaunchKernel ( const char* hostFun, dim3 grid
struct CUstream_st *s = (struct CUstream_st *)stream;
g_cuda_launch_stack.push_back( kernel_config(gridDim,blockDim,sharedMem,s) );
-
//printf("cudaLaunchKernel:sizeof(Arg[0])=%d)\n ",sizeof(args[0]));
kernel_config &config = g_cuda_launch_stack.back();
config.set_arg(args[0],432,0);//standard interface for cutlass library #TODO Implementing a generalized kernel
@@ -1006,12 +1005,15 @@ __host__ cudaError_t CUDARTAPI cudaLaunchKernel ( const char* hostFun, dim3 grid
dim3 blockDim1 = config1.block_dim();
printf("GPGPU-Sim PTX: pushing kernel \'%s\' to stream %u, gridDim= (%u,%u,%u) blockDim = (%u,%u,%u) \n",
kname.c_str(), stream1?stream1->get_uid():0, gridDim1.x,gridDim1.y,gridDim1.z,blockDim1.x,blockDim1.y,blockDim1.z );
+
+ /*Kernel is hardcoded to enable the cutlass library*/
+ std::string cutlass("cutlass");
+ assert(kname.find(cutlass) != std::string::npos);
+
stream_operation op(grid,g_ptx_sim_mode,stream1);
g_stream_manager->push(op);
g_cuda_launch_stack.pop_back();
return g_last_cudaError = cudaSuccess;
-
-
}
/*******************************************************************************
diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h
index f561f34..71d3d89 100644
--- a/src/abstract_hardware_model.h
+++ b/src/abstract_hardware_model.h
@@ -36,6 +36,10 @@ class kernel_info_t;
#define MAX_CTA_PER_SHADER 32
#define MAX_BARRIERS_PER_CTA 16
+//After expanding the vector input and output operands
+#define MAX_INPUT_VALUES 24
+#define MAX_OUTPUT_VALUES 8
+
enum _memory_space_t {
undefined_space=0,
reg_space,
@@ -830,7 +834,9 @@ public:
address_type reconvergence_pc; // -1 => not a branch, -2 => use function return address
unsigned out[8];
+ unsigned outcount;
unsigned in[24];
+ unsigned incount;
unsigned char is_vectorin;
unsigned char is_vectorout;
int pred; // predicate register number
diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc
index 86a1d45..23c5ad5 100644
--- a/src/cuda-sim/cuda-sim.cc
+++ b/src/cuda-sim/cuda-sim.cc
@@ -602,7 +602,7 @@ void ptx_instruction::set_opcode_and_latency()
* [3] MAD
* [4] DIV
*/
- sscanf(opcode_latency_int, "%u,%u,%u,%u,%u,%u,%u",
+ sscanf(opcode_latency_int, "%u,%u,%u,%u,%u",
&int_latency[0],&int_latency[1],&int_latency[2],
&int_latency[3],&int_latency[4]);
sscanf(opcode_latency_fp, "%u,%u,%u,%u,%u",
@@ -850,12 +850,14 @@ void ptx_instruction::pre_decode()
{
pc = m_PC;
isize = m_inst_size;
- for(unsigned i=0; i<8; i++) {
+ for(unsigned i=0; i<MAX_OUTPUT_VALUES; i++) {
out[i] = 0;
}
- for(unsigned i=0; i<24; i++) {
+ for(unsigned i=0; i<MAX_INPUT_VALUES; i++) {
in[i] = 0;
}
+ incount=0;
+ outcount=0;
is_vectorin = 0;
is_vectorout = 0;
std::fill_n(arch_reg.src, MAX_REG_OPERANDS, -1);
@@ -960,6 +962,15 @@ void ptx_instruction::pre_decode()
}
}
}
+
+ //Setting number of input and output operands which is required for scoreboard check
+ for(int i=0;i<MAX_OUTPUT_VALUES;i++)
+ if(out[i]>0)
+ outcount++;
+
+ for(int i=0;i<MAX_INPUT_VALUES;i++)
+ if(in[i]>0)
+ incount++;
// Get predicate
if(has_pred()) {
@@ -1316,7 +1327,10 @@ void ptx_thread_info::ptx_exec_inst( warp_inst_t &inst, unsigned lane_id)
if(((inst_opcode==MMA_OP||inst_opcode==MMA_LD_OP||inst_opcode==MMA_ST_OP))){
if(inst.active_count()!=MAX_WARP_SIZE)
- while(1);
+ {
+ printf("Tensor Core operation are warp synchronous operation. All the threads needs to be active.");
+ assert(0);
+ }
}
if(((inst_opcode!=MMA_OP)&&(inst_opcode!=MMA_LD_OP)&&(inst_opcode!=MMA_ST_OP))||((inst_opcode==MMA_OP||inst_opcode==MMA_LD_OP||inst_opcode==MMA_ST_OP)&&(lane_id==0))){
diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc
index 2677c40..06cad54 100644
--- a/src/cuda-sim/instructions.cc
+++ b/src/cuda-sim/instructions.cc
@@ -1726,7 +1726,7 @@ void mma_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
unsigned b_layout = pI->get_wmma_layout(1);
unsigned type = pI->get_type();
unsigned type2 = pI->get_type2();
- int tid = inst.warp_id_func() * core->get_warp_size();
+ int tid = inst.warp_id() * core->get_warp_size();
const operand_info &dst = pI->operand_lookup(0);
unsigned thread_group_index;
@@ -2962,7 +2962,7 @@ void mma_st_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
const operand_info &src = pI->operand_lookup(1);
const operand_info &src1 = pI->operand_lookup(0);
const operand_info &src2 = pI->operand_lookup(2);
- int tid = inst.warp_id_func()*core->get_warp_size();
+ int tid = inst.warp_id()*core->get_warp_size();
unsigned type = pI->get_type();
unsigned wmma_type = pI->get_wmma_type();
unsigned wmma_layout = pI->get_wmma_layout(0);
@@ -3069,7 +3069,7 @@ void mma_ld_impl( const ptx_instruction *pI, core_t *core, warp_inst_t &inst )
unsigned type = pI->get_type();
unsigned wmma_type = pI->get_wmma_type();
unsigned wmma_layout = pI->get_wmma_layout(0);
- int tid = inst.warp_id_func()*core->get_warp_size();
+ int tid = inst.warp_id()*core->get_warp_size();
int thrd,stride;
ptx_thread_info *thread;
_memory_op_t insn_memory_op = pI->has_memory_read() ? memory_load : memory_store;
@@ -4469,7 +4469,13 @@ void set_impl( const ptx_instruction *pI, ptx_thread_info *thread )
void shfl_impl( const ptx_instruction *pI, core_t *core, warp_inst_t inst )
{
unsigned i_type = pI->get_type();
- int tid = inst.warp_id_func() * core->get_warp_size();
+ int tid;
+
+ if(core->get_gpu()->is_functional_sim())
+ tid = inst.warp_id_func() * core->get_warp_size();
+ else
+ tid = inst.warp_id() * core->get_warp_size();
+
ptx_thread_info *thread = core->get_thread_info()[tid];
ptx_warp_info *warp_info = thread->m_warp_info;
int lane = warp_info->get_done_threads();
diff --git a/src/cuda-sim/ptx_parser.cc b/src/cuda-sim/ptx_parser.cc
index d5324d0..9671ab7 100644
--- a/src/cuda-sim/ptx_parser.cc
+++ b/src/cuda-sim/ptx_parser.cc
@@ -39,7 +39,7 @@ void set_ptx_warp_size(const struct core_config * warp_size)
g_shader_core_config=warp_size;
}
-static bool g_debug_ir_generation=true;
+static bool g_debug_ir_generation=false;
const char *g_filename;
unsigned g_max_regs_per_thread = 0;
diff --git a/src/gpgpu-sim/scoreboard.cc b/src/gpgpu-sim/scoreboard.cc
index 4d1b43a..ebec891 100644
--- a/src/gpgpu-sim/scoreboard.cc
+++ b/src/gpgpu-sim/scoreboard.cc
@@ -82,7 +82,7 @@ const bool Scoreboard::islongop (unsigned warp_id,unsigned regnum) {
void Scoreboard::reserveRegisters(const class warp_inst_t* inst)
{
- for( unsigned r=0; r < 8; r++) {
+ for( unsigned r=0; r < MAX_OUTPUT_VALUES; r++) {
if(inst->out[r] > 0) {
reserveRegister(inst->warp_id(), inst->out[r]);
SHADER_DPRINTF( SCOREBOARD,
@@ -100,7 +100,7 @@ void Scoreboard::reserveRegisters(const class warp_inst_t* inst)
inst->space.get_type() == param_space_local ||
inst->space.get_type() == param_space_unclassified ||
inst->space.get_type() == tex_space)){
- for ( unsigned r=0; r<8; r++) {
+ for ( unsigned r=0; r<MAX_OUTPUT_VALUES; r++) {
if(inst->out[r] > 0) {
SHADER_DPRINTF( SCOREBOARD,
"New longopreg marked - warp:%d, reg: %d\n",
@@ -115,7 +115,7 @@ void Scoreboard::reserveRegisters(const class warp_inst_t* inst)
// Release registers for an instruction
void Scoreboard::releaseRegisters(const class warp_inst_t *inst)
{
- for( unsigned r=0; r < 8; r++) {
+ for( unsigned r=0; r < MAX_OUTPUT_VALUES; r++) {
if(inst->out[r] > 0) {
SHADER_DPRINTF( SCOREBOARD,
"Register Released - warp:%d, reg: %d\n",
@@ -138,39 +138,11 @@ bool Scoreboard::checkCollision( unsigned wid, const class inst_t *inst ) const
// Get list of all input and output registers
std::set<int> inst_regs;
- if(inst->out[0] > 0) inst_regs.insert(inst->out[0]);
- if(inst->out[1] > 0) inst_regs.insert(inst->out[1]);
- if(inst->out[2] > 0) inst_regs.insert(inst->out[2]);
- if(inst->out[3] > 0) inst_regs.insert(inst->out[3]);
- if(inst->out[4] > 0) inst_regs.insert(inst->out[4]);
- if(inst->out[5] > 0) inst_regs.insert(inst->out[5]);
- if(inst->out[6] > 0) inst_regs.insert(inst->out[6]);
- if(inst->out[7] > 0) inst_regs.insert(inst->out[7]);
+ for(int iii=0;iii<inst->outcount;iii++)
+ inst_regs.insert(inst->out[iii]);
- if(inst->in[0] > 0) inst_regs.insert(inst->in[0]);
- if(inst->in[1] > 0) inst_regs.insert(inst->in[1]);
- if(inst->in[2] > 0) inst_regs.insert(inst->in[2]);
- if(inst->in[3] > 0) inst_regs.insert(inst->in[3]);
- if(inst->in[4] > 0) inst_regs.insert(inst->in[4]);
- if(inst->in[5] > 0) inst_regs.insert(inst->in[5]);
- if(inst->in[6] > 0) inst_regs.insert(inst->in[6]);
- if(inst->in[7] > 0) inst_regs.insert(inst->in[7]);
- if(inst->in[8] > 0) inst_regs.insert(inst->in[8]);
- if(inst->in[9] > 0) inst_regs.insert(inst->in[9]);
- if(inst->in[10] > 0) inst_regs.insert(inst->in[10]);
- if(inst->in[11] > 0) inst_regs.insert(inst->in[11]);
- if(inst->in[12] > 0) inst_regs.insert(inst->in[12]);
- if(inst->in[13] > 0) inst_regs.insert(inst->in[13]);
- if(inst->in[14] > 0) inst_regs.insert(inst->in[14]);
- if(inst->in[15] > 0) inst_regs.insert(inst->in[15]);
- if(inst->in[16] > 0) inst_regs.insert(inst->in[16]);
- if(inst->in[17] > 0) inst_regs.insert(inst->in[17]);
- if(inst->in[18] > 0) inst_regs.insert(inst->in[18]);
- if(inst->in[19] > 0) inst_regs.insert(inst->in[19]);
- if(inst->in[20] > 0) inst_regs.insert(inst->in[20]);
- if(inst->in[21] > 0) inst_regs.insert(inst->in[21]);
- if(inst->in[22] > 0) inst_regs.insert(inst->in[22]);
- if(inst->in[23] > 0) inst_regs.insert(inst->in[23]);
+ for(int jjj=0;jjj<inst->incount;jjj++)
+ inst_regs.insert(inst->in[jjj]);
if(inst->pred > 0) inst_regs.insert(inst->pred);
if(inst->ar1 > 0) inst_regs.insert(inst->ar1);
diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc
index 23f255d..f9cfa58 100644
--- a/src/gpgpu-sim/shader.cc
+++ b/src/gpgpu-sim/shader.cc
@@ -425,7 +425,7 @@ void shader_core_stats::print( FILE* fout ) const
fprintf(fout, "gpgpu_n_load_insn = %d\n", gpgpu_n_load_insn);
fprintf(fout, "gpgpu_n_store_insn = %d\n", gpgpu_n_store_insn);
fprintf(fout, "gpgpu_n_shmem_insn = %d\n", gpgpu_n_shmem_insn);
- fprintf(fout, "gpgpu_n_shmem_insn = %d\n", gpgpu_n_sstarr_insn);
+ fprintf(fout, "gpgpu_n_sstarr_insn = %d\n", gpgpu_n_sstarr_insn);
fprintf(fout, "gpgpu_n_tex_insn = %d\n", gpgpu_n_tex_insn);
fprintf(fout, "gpgpu_n_const_mem_insn = %d\n", gpgpu_n_const_insn);
fprintf(fout, "gpgpu_n_param_mem_insn = %d\n", gpgpu_n_param_insn);
@@ -1290,6 +1290,12 @@ void ldst_unit::get_L1T_sub_stats(struct cache_sub_stats &css) const{
void shader_core_ctx::warp_inst_complete(const warp_inst_t &inst)
{
+
+ #if 0
+ printf("[warp_inst_complete] uid=%u core=%u warp=%u pc=%#x @ time=%llu issued@%llu\n",
+ inst.get_uid(), m_sid, inst.warp_id(), inst.pc, gpu_tot_sim_cycle + gpu_sim_cycle, inst.get_issue_cycle());
+ #endif
+
if(inst.op_pipe==SP__OP)
m_stats->m_num_sp_committed[m_sid]++;
else if(inst.op_pipe==SFU__OP)
@@ -1386,7 +1392,7 @@ ldst_unit::process_cache_access( cache_t* cache,
assert( !read_sent );
inst.accessq_pop_back();
if ( inst.is_load() ) {
- for ( unsigned r=0; r < 8; r++)
+ for ( unsigned r=0; r < MAX_OUTPUT_VALUES; r++)
if (inst.out[r] > 0)
m_pending_writes[inst.warp_id()][inst.out[r]]--;
}
@@ -1488,7 +1494,7 @@ bool ldst_unit::memory_cycle( warp_inst_t &inst, mem_stage_stall_type &stall_rea
inst.accessq_pop_back();
//inst.clear_active( access.get_warp_mask() );
if( inst.is_load() ) {
- for( unsigned r=0; r < 8; r++)
+ for( unsigned r=0; r < MAX_OUTPUT_VALUES; r++)
if(inst.out[r] > 0)
assert( m_pending_writes[inst.warp_id()][inst.out[r]] > 0 );
} else if( inst.is_store() )
@@ -1765,7 +1771,7 @@ void ldst_unit:: issue( register_set &reg_set )
if (inst->is_load() and inst->space.get_type() != shared_space) {
unsigned warp_id = inst->warp_id();
unsigned n_accesses = inst->accessq_count();
- for (unsigned r = 0; r < 8; r++) {
+ for (unsigned r = 0; r < MAX_OUTPUT_VALUES; r++) {
unsigned reg_id = inst->out[r];
if (reg_id > 0) {
m_pending_writes[warp_id][reg_id] += n_accesses;
@@ -1787,7 +1793,7 @@ void ldst_unit::writeback()
if( !m_next_wb.empty() ) {
if( m_operand_collector->writeback(m_next_wb) ) {
bool insn_completed = false;
- for( unsigned r=0; r < 8; r++ ) {
+ for( unsigned r=0; r < MAX_OUTPUT_VALUES; r++ ) {
if( m_next_wb.out[r] > 0 ) {
if( m_next_wb.space.get_type() != shared_space ) {
assert( m_pending_writes[m_next_wb.warp_id()][m_next_wb.out[r]] > 0 );
@@ -1989,7 +1995,7 @@ void ldst_unit::cycle()
//}
bool pending_requests=false;
- for( unsigned r=0; r<8; r++ ) {
+ for( unsigned r=0; r<MAX_OUTPUT_VALUES; r++ ) {
unsigned reg_id = pipe_reg.out[r];
if( reg_id > 0 ) {
if( m_pending_writes[warp_id].find(reg_id) != m_pending_writes[warp_id].end() ) {
generated by cgit v1.3 (git 2.53.0) at 2026-07-11 03:37:22 +0000