diff options
| -rw-r--r-- | configs/4.x-cfgs/SM2_GTX480/gpgpusim.config | 1 | ||||
| -rw-r--r-- | configs/4.x-cfgs/SM6_TITANX/gpgpusim.config | 1 | ||||
| -rw-r--r-- | configs/4.x-cfgs/SM7_TITANV/gpgpusim.config | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/configs/4.x-cfgs/SM2_GTX480/gpgpusim.config b/configs/4.x-cfgs/SM2_GTX480/gpgpusim.config index c96432b..b965aff 100644 --- a/configs/4.x-cfgs/SM2_GTX480/gpgpusim.config +++ b/configs/4.x-cfgs/SM2_GTX480/gpgpusim.config @@ -57,6 +57,7 @@ -gpgpu_n_cluster_ejection_buffer_size 32 -l1_latency 35 -smem_latency 26 +-gpgpu_flush_l1_cache 1 # The alternative configuration for fermi in case cudaFuncCachePreferL1 is selected #-gpgpu_cache:dl1 N:64:128:6,L:L:m:N:H,S:64:8,8 diff --git a/configs/4.x-cfgs/SM6_TITANX/gpgpusim.config b/configs/4.x-cfgs/SM6_TITANX/gpgpusim.config index 45a87cd..3723163 100644 --- a/configs/4.x-cfgs/SM6_TITANX/gpgpusim.config +++ b/configs/4.x-cfgs/SM6_TITANX/gpgpusim.config @@ -76,6 +76,7 @@ -gpgpu_n_cluster_ejection_buffer_size 32 -l1_latency 82 -smem_latency 24 +-gpgpu_flush_l1_cache 1 # 64 sets, each 128 bytes 16-way for each memory sub partition (128 KB per memory sub partition). This gives 3MB L2 cache -gpgpu_cache:dl2 S:64:128:16,L:B:m:L:L,A:256:64,16:0,32 diff --git a/configs/4.x-cfgs/SM7_TITANV/gpgpusim.config b/configs/4.x-cfgs/SM7_TITANV/gpgpusim.config index de3558a..cc4c931 100644 --- a/configs/4.x-cfgs/SM7_TITANV/gpgpusim.config +++ b/configs/4.x-cfgs/SM7_TITANV/gpgpusim.config @@ -77,6 +77,7 @@ -gpgpu_n_cluster_ejection_buffer_size 32 -l1_latency 28 -smem_latency 19 +-gpgpu_flush_l1_cache 1 # 64 sets, each 128 bytes 24-way for each memory sub partition (192 KB per memory sub partition). This gives 4.5MB L2 cache -gpgpu_cache:dl2 S:64:128:24,L:B:m:L:L,A:384:4,32:0,32 |