diff options
Diffstat (limited to 'configs/tested-cfgs/SM75_RTX2060')
| -rw-r--r-- | configs/tested-cfgs/SM75_RTX2060/gpgpusim.config | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/configs/tested-cfgs/SM75_RTX2060/gpgpusim.config b/configs/tested-cfgs/SM75_RTX2060/gpgpusim.config index a994370..cc3152c 100644 --- a/configs/tested-cfgs/SM75_RTX2060/gpgpusim.config +++ b/configs/tested-cfgs/SM75_RTX2060/gpgpusim.config @@ -55,7 +55,7 @@ -ptx_opcode_initiation_int 2,2,2,2,2 -ptx_opcode_latency_fp 4,4,4,4,39 -ptx_opcode_initiation_fp 2,2,2,2,4 --ptx_opcode_latency_dp 54,54,54,54,330 +-ptx_opcode_latency_dp 64,64,64,64,330 -ptx_opcode_initiation_dp 64,64,64,64,130 -ptx_opcode_latency_sfu 21 -ptx_opcode_initiation_sfu 8 @@ -87,11 +87,11 @@ # In adaptive cache, we adaptively assign the remaining shared memory to L1 cache # For more info, see https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#shared-memory-7-x -gpgpu_adaptive_cache_config 1 --gpgpu_shmem_option 0,8,16,32,64,64 --gpgpu_unified_l1d_size 64 +-gpgpu_shmem_option 32,64 +-gpgpu_unified_l1d_size 96 # L1 cache configuration -gpgpu_l1_banks 4 --gpgpu_cache:dl1 S:4:128:128,L:T:m:L:L,A:256:32,16:0,32 +-gpgpu_cache:dl1 S:4:128:64,L:T:m:L:L,A:256:32,16:0,32 -gpgpu_l1_latency 32 -gpgpu_gmem_skip_L1D 0 -gpgpu_flush_l1_cache 1 |